6b7b53f5b9
As a preparation step for fast8 support, we need to update the tests to pass in both modes. That requires generalizing the shadow width and remove any hard coded references that assume it's always 2 bytes. Reviewed By: stephan.yichao.zhao Differential Revision: https://reviews.llvm.org/D97884
33 lines
1.2 KiB
LLVM
33 lines
1.2 KiB
LLVM
; RUN: opt < %s -dfsan -dfsan-event-callbacks=1 -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
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; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
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define i8 @load8(i8* %p) {
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; CHECK: call void @__dfsan_load_callback(i[[#SBITS]] %[[LABEL:.*]], i8* %p)
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; CHECK: %a = load i8, i8* %p
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; CHECK: store i[[#SBITS]] %[[LABEL]], i[[#SBITS]]* bitcast ({{.*}}* @__dfsan_retval_tls to i[[#SBITS]]*)
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%a = load i8, i8* %p
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ret i8 %a
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}
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define void @store8(i8* %p, i8 %a) {
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; CHECK: store i[[#SBITS]] %[[LABEL:.*]], i[[#SBITS]]* %{{.*}}
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; CHECK: call void @__dfsan_store_callback(i[[#SBITS]] %[[LABEL]], i8* %p)
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; CHECK: store i8 %a, i8* %p
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store i8 %a, i8* %p
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ret void
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}
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define i1 @cmp(i8 %a, i8 %b) {
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; CHECK: call void @__dfsan_cmp_callback(i[[#SBITS]] %[[CMPLABEL:.*]])
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; CHECK: %c = icmp ne i8 %a, %b
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; CHECK: store i[[#SBITS]] %[[CMPLABEL]], i[[#SBITS]]* bitcast ({{.*}}* @__dfsan_retval_tls to i[[#SBITS]]*)
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%c = icmp ne i8 %a, %b
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ret i1 %c
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} |