176bbcae11
The MemorySSA-based implementation has been enabled without issue for a while now, so keeping the old implementation around doesn't seem useful anymore. This drops the MemDep-based implementation. Differential Revision: https://reviews.llvm.org/D97877
22 lines
930 B
LLVM
22 lines
930 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -dse -S | FileCheck %s
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; Both stores should be emitted because we can't tell if the gather aliases.
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define <4 x i32> @bar(<4 x i32> %arg, i32* %arg1) {
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; CHECK-LABEL: @bar(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: store i32 5, i32* [[ARG1:%.*]]
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; CHECK-NEXT: [[TMP:%.*]] = tail call <4 x i32> @llvm.x86.avx2.gather.d.d(<4 x i32> zeroinitializer, i8* null, <4 x i32> [[ARG:%.*]], <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i8 1)
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; CHECK-NEXT: store i32 10, i32* [[ARG1]]
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; CHECK-NEXT: ret <4 x i32> [[TMP]]
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;
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bb:
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store i32 5, i32* %arg1
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%tmp = tail call <4 x i32> @llvm.x86.avx2.gather.d.d(<4 x i32> zeroinitializer, i8* null, <4 x i32> %arg, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i8 1)
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store i32 10, i32* %arg1
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ret <4 x i32> %tmp
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}
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declare <4 x i32> @llvm.x86.avx2.gather.d.d(<4 x i32>, i8*, <4 x i32>, <4 x i32>, i8)
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