ee34d9b210
This is a repeat of 1880092722 from 2009. We should have less risk
of hitting bugs at this point because we auto-generate positive CHECK
lines only, but this makes things consistent.
Copying the original commit msg:
"Change tests from "opt %s" to "opt < %s" so that opt doesn't see the
input filename so that opt doesn't print the input filename in the
output so that grep lines in the tests don't unintentionally match
strings in the input filename."
156 lines
3.7 KiB
LLVM
156 lines
3.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; Fold
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; (%x - %y) u> %x
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; to
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; @llvm.sub.with.overflow(%x, %y) + extractvalue
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define i1 @t0_basic(i8 %x, i8 %y) {
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; CHECK-LABEL: @t0_basic(
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; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[Y:%.*]], [[X:%.*]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = sub i8 %x, %y
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%r = icmp ugt i8 %t0, %x
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ret i1 %r
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}
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define <2 x i1> @t1_vec(<2 x i8> %x, <2 x i8> %y) {
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; CHECK-LABEL: @t1_vec(
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; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i8> [[Y:%.*]], [[X:%.*]]
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; CHECK-NEXT: ret <2 x i1> [[R]]
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;
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%t0 = sub <2 x i8> %x, %y
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%r = icmp ugt <2 x i8> %t0, %x
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ret <2 x i1> %r
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}
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; Commutativity
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define i1 @t2_commutative(i8 %x, i8 %y) {
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; CHECK-LABEL: @t2_commutative(
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; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[Y:%.*]], [[X:%.*]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = sub i8 %x, %y
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%r = icmp ult i8 %x, %t0 ; swapped
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ret i1 %r
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}
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; Extra-use tests
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declare void @use8(i8)
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define i1 @t3_extrause0(i8 %x, i8 %y) {
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; CHECK-LABEL: @t3_extrause0(
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; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: call void @use8(i8 [[T0]])
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; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[X]], [[Y]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = sub i8 %x, %y
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call void @use8(i8 %t0)
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%r = icmp ugt i8 %t0, %x
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ret i1 %r
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}
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; Negative tests
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define i1 @n4_not_commutative(i8 %x, i8 %y) {
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; CHECK-LABEL: @n4_not_commutative(
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; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[T0]], [[Y]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = sub i8 %x, %y
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%r = icmp ugt i8 %t0, %y ; can't check against %y.
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ret i1 %r
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}
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define i1 @n5_wrong_pred0(i8 %x, i8 %y) {
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; CHECK-LABEL: @n5_wrong_pred0(
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; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[T0]], [[X]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = sub i8 %x, %y
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%r = icmp uge i8 %t0, %x
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ret i1 %r
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}
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define i1 @n6_wrong_pred1(i8 %x, i8 %y) {
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; CHECK-LABEL: @n6_wrong_pred1(
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; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[T0]], [[X]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = sub i8 %x, %y
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%r = icmp ult i8 %t0, %x
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ret i1 %r
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}
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define i1 @n7_wrong_pred2(i8 %x, i8 %y) {
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; CHECK-LABEL: @n7_wrong_pred2(
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; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[Y:%.*]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = sub i8 %x, %y
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%r = icmp eq i8 %t0, %x
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ret i1 %r
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}
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define i1 @n8_wrong_pred3(i8 %x, i8 %y) {
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; CHECK-LABEL: @n8_wrong_pred3(
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; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[Y:%.*]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = sub i8 %x, %y
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%r = icmp ne i8 %t0, %x
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ret i1 %r
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}
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define i1 @n9_wrong_pred4(i8 %x, i8 %y) {
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; CHECK-LABEL: @n9_wrong_pred4(
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; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[T0]], [[X]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = sub i8 %x, %y
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%r = icmp slt i8 %t0, %x
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ret i1 %r
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}
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define i1 @n10_wrong_pred5(i8 %x, i8 %y) {
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; CHECK-LABEL: @n10_wrong_pred5(
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; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp sle i8 [[T0]], [[X]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = sub i8 %x, %y
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%r = icmp sle i8 %t0, %x
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ret i1 %r
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}
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define i1 @n11_wrong_pred6(i8 %x, i8 %y) {
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; CHECK-LABEL: @n11_wrong_pred6(
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; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp sgt i8 [[T0]], [[X]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = sub i8 %x, %y
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%r = icmp sgt i8 %t0, %x
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ret i1 %r
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}
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define i1 @n12_wrong_pred7(i8 %x, i8 %y) {
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; CHECK-LABEL: @n12_wrong_pred7(
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; CHECK-NEXT: [[T0:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp sge i8 [[T0]], [[X]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = sub i8 %x, %y
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%r = icmp sge i8 %t0, %x
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ret i1 %r
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}
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