395607af3c
This was reverted to mitigate mitigate miscompiles caused by the logical and/or to bitwise and/or fold. Reapply it now that the underlying issue has been fixed by D101191. ----- This patch folds more operations to poison. Alive2 proof: https://alive2.llvm.org/ce/z/mxcb9G (it does not contain tests about div/rem because they fold to poison when raising UB) Reviewed By: nikic Differential Revision: https://reviews.llvm.org/D92270
70 lines
1.8 KiB
LLVM
70 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instsimplify -S -o - | FileCheck %s
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; When both operands are undef in a lane, that lane should produce an undef result.
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define <3 x i8> @shl() {
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; CHECK-LABEL: @shl(
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; CHECK-NEXT: ret <3 x i8> <i8 poison, i8 0, i8 0>
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;
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%c = shl <3 x i8> undef, <i8 undef, i8 4, i8 1>
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ret <3 x i8> %c
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}
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define <3 x i8> @and() {
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; CHECK-LABEL: @and(
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; CHECK-NEXT: ret <3 x i8> <i8 undef, i8 0, i8 undef>
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;
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%c = and <3 x i8> <i8 undef, i8 42, i8 undef>, undef
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ret <3 x i8> %c
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}
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define <3 x i8> @and_commute() {
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; CHECK-LABEL: @and_commute(
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; CHECK-NEXT: ret <3 x i8> <i8 0, i8 0, i8 undef>
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;
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%c = and <3 x i8> undef, <i8 -42, i8 42, i8 undef>
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ret <3 x i8> %c
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}
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define <3 x i8> @or() {
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; CHECK-LABEL: @or(
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; CHECK-NEXT: ret <3 x i8> <i8 undef, i8 -1, i8 undef>
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;
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%c = or <3 x i8> <i8 undef, i8 42, i8 undef>, undef
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ret <3 x i8> %c
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}
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define <3 x i8> @or_commute() {
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; CHECK-LABEL: @or_commute(
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; CHECK-NEXT: ret <3 x i8> <i8 -1, i8 -1, i8 undef>
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;
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%c = or <3 x i8> undef, <i8 -42, i8 42, i8 undef>
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ret <3 x i8> %c
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}
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define <3 x float> @fadd() {
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; CHECK-LABEL: @fadd(
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; CHECK-NEXT: ret <3 x float> <float undef, float 0x7FF8000000000000, float undef>
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;
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%c = fadd <3 x float> <float undef, float 42.0, float undef>, undef
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ret <3 x float> %c
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}
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define <3 x float> @fadd_commute() {
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; CHECK-LABEL: @fadd_commute(
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; CHECK-NEXT: ret <3 x float> <float 0x7FF8000000000000, float 0x7FF8000000000000, float undef>
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;
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%c = fadd <3 x float> undef, <float -42.0, float 42.0, float undef>
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ret <3 x float> %c
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}
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define <4 x i32> @shuffle_of_undefs(<4 x i32> %v1, <4 x i32> %v2) {
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; CHECK-LABEL: @shuffle_of_undefs(
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; CHECK-NEXT: ret <4 x i32> undef
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;
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%r = shufflevector <4 x i32> undef, <4 x i32> undef, <4 x i32> <i32 5, i32 1, i32 2, i32 3>
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ret <4 x i32> %r
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}
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