23c2f2e6b2
This patch marks the induction increment of the main induction variable of the vector loop as NUW when not folding the tail. If the tail is not folded, we know that End - Start >= Step (either statically or through the minimum iteration checks). We also know that both Start % Step == 0 and End % Step == 0. We exit the vector loop if %IV + %Step == %End. Hence we must exit the loop before %IV + %Step unsigned overflows and we can mark the induction increment as NUW. This should make SCEV return more precise bounds for the created vector loops, used by later optimizations, like late unrolling. At the moment quite a few tests still need to be updated, but before doing so I'd like to get initial feedback to make sure I am not missing anything. Note that this could probably be further improved by using information from the original IV. Attempt of modeling of the assumption in Alive2: https://alive2.llvm.org/ce/z/H_DL_g Part of a set of fixes required for PR50412. Reviewed By: mkazantsev Differential Revision: https://reviews.llvm.org/D103255
80 lines
4.0 KiB
LLVM
80 lines
4.0 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt < %s -loop-vectorize -disable-output -debug-only=loop-vectorize 2>&1 | FileCheck %s --check-prefix=COST
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; RUN: opt < %s -loop-vectorize -force-vector-width=2 -instcombine -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--linux-gnu"
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; This test checks that we correctly compute the scalarized operands for a
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; user-specified vectorization factor when interleaving is disabled. We use the
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; "optsize" attribute to disable all interleaving calculations. A cost of 4
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; for %tmp4 indicates that we would scalarize it's operand (%tmp3), giving
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; %tmp4 a lower scalarization overhead.
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;
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; COST-LABEL: predicated_udiv_scalarized_operand
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; COST: LV: Found an estimated cost of 4 for VF 2 For instruction: %tmp4 = udiv i64 %tmp2, %tmp3
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;
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; CHECK-LABEL: @predicated_udiv_scalarized_operand(
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %entry ], [ [[INDEX_NEXT:%.*]], %[[PRED_UDIV_CONTINUE2:.*]] ]
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; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <2 x i64> [ zeroinitializer, %entry ], [ [[TMP17:%.*]], %[[PRED_UDIV_CONTINUE2]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, i64* %a, i64 [[INDEX]]
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[TMP0]] to <2 x i64>*
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, <2 x i64>* [[TMP1]], align 4
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; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt <2 x i64> [[WIDE_LOAD]], zeroinitializer
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; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i1> [[TMP2]], i32 0
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; CHECK-NEXT: br i1 [[TMP3]], label %[[PRED_UDIV_IF:.*]], label %[[PRED_UDIV_CONTINUE:.*]]
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; CHECK: [[PRED_UDIV_IF]]:
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; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i64> [[WIDE_LOAD]], i32 0
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; CHECK-NEXT: [[TMP5:%.*]] = add nsw i64 [[TMP4]], %x
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; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i64> [[WIDE_LOAD]], i32 0
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; CHECK-NEXT: [[TMP7:%.*]] = udiv i64 [[TMP6]], [[TMP5]]
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; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i64> poison, i64 [[TMP7]], i32 0
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; CHECK-NEXT: br label %[[PRED_UDIV_CONTINUE]]
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; CHECK: [[PRED_UDIV_CONTINUE]]:
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; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x i64> [ poison, %vector.body ], [ [[TMP8]], %[[PRED_UDIV_IF]] ]
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; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP2]], i32 1
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; CHECK-NEXT: br i1 [[TMP10]], label %[[PRED_UDIV_IF1:.*]], label %[[PRED_UDIV_CONTINUE2]]
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; CHECK: [[PRED_UDIV_IF1]]:
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; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i64> [[WIDE_LOAD]], i32 1
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; CHECK-NEXT: [[TMP12:%.*]] = add nsw i64 [[TMP11]], %x
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; CHECK-NEXT: [[TMP13:%.*]] = extractelement <2 x i64> [[WIDE_LOAD]], i32 1
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; CHECK-NEXT: [[TMP14:%.*]] = udiv i64 [[TMP13]], [[TMP12]]
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; CHECK-NEXT: [[TMP15:%.*]] = insertelement <2 x i64> [[TMP9]], i64 [[TMP14]], i32 1
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; CHECK-NEXT: br label %[[PRED_UDIV_CONTINUE2]]
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; CHECK: [[PRED_UDIV_CONTINUE2]]:
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; CHECK-NEXT: [[TMP16:%.*]] = phi <2 x i64> [ [[TMP9]], %[[PRED_UDIV_CONTINUE]] ], [ [[TMP15]], %[[PRED_UDIV_IF1]] ]
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; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP2]], <2 x i64> [[TMP16]], <2 x i64> [[WIDE_LOAD]]
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; CHECK-NEXT: [[TMP17]] = add <2 x i64> [[VEC_PHI]], [[PREDPHI]]
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
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; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body
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;
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define i64 @predicated_udiv_scalarized_operand(i64* %a, i64 %x) optsize {
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entry:
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br label %for.body
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for.body:
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%i = phi i64 [ 0, %entry ], [ %i.next, %for.inc ]
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%r = phi i64 [ 0, %entry ], [ %tmp6, %for.inc ]
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%tmp0 = getelementptr inbounds i64, i64* %a, i64 %i
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%tmp2 = load i64, i64* %tmp0, align 4
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%cond0 = icmp sgt i64 %tmp2, 0
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br i1 %cond0, label %if.then, label %for.inc
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if.then:
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%tmp3 = add nsw i64 %tmp2, %x
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%tmp4 = udiv i64 %tmp2, %tmp3
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br label %for.inc
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for.inc:
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%tmp5 = phi i64 [ %tmp2, %for.body ], [ %tmp4, %if.then]
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%tmp6 = add i64 %r, %tmp5
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%i.next = add nuw nsw i64 %i, 1
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%cond1 = icmp slt i64 %i.next, 100
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br i1 %cond1, label %for.body, label %for.end
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for.end:
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%tmp7 = phi i64 [ %tmp6, %for.inc ]
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ret i64 %tmp7
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}
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