4f86aa650c
This patch adds a new option to the LoopVectorizer to control how
scalable vectors can be used.
Initially, this suggests three levels to control scalable
vectorization, although other more aggressive options can be added in
the future.
The possible options are:
- Disabled: Disables vectorization with scalable vectors.
- Enabled: Vectorize loops using scalable vectors or fixed-width
vectors, but favors fixed-width vectors when the cost
is a tie.
- Preferred: Like 'Enabled', but favoring scalable vectors when the
cost-model is inconclusive.
Reviewed By: paulwalker-arm, vkmr
Differential Revision: https://reviews.llvm.org/D101945
34 lines
1.1 KiB
LLVM
34 lines
1.1 KiB
LLVM
; RUN: opt -loop-vectorize -scalable-vectorization=on -force-target-instruction-cost=1 -prefer-predicate-over-epilogue=predicate-dont-vectorize -S < %s 2>&1 | FileCheck %s
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; This test currently fails when the LV calculates a maximums safe
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; distance for scalable vectors, because the code to eliminate the tail is
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; pessimistic when scalable vectors are considered. This will be addressed
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; in a future patch, at which point we should be able to un-XFAIL the
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; test. The expected output is to vectorize this loop without predication
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; (and thus have unpredicated vector store).
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; XFAIL: *
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; CHECK: store <4 x i32>
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target triple = "aarch64"
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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define void @f1(i32* %A) #0 {
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%arrayidx = getelementptr inbounds i32, i32* %A, i64 %iv
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store i32 1, i32* %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp ne i64 %iv.next, 1024
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br i1 %exitcond, label %for.body, label %exit
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exit:
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ret void
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}
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attributes #0 = { "target-features"="+sve" }
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