Dávid Bolvanský 00f8aecf6e [NFC] Added testcase for PR40750

2021-09-02 22:44:03 +02:00

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AArch64

[PhaseOrdering] Add test for missed vectorization with vector::at calls.

2021-08-16 09:43:30 +01:00

ARM

[ARM] Workaround tailpredication min/max costmodel

2021-08-30 19:19:51 +01:00

X86

[AggressiveInstCombine] Add logical shift right instr to TruncInstCombine DAG

2021-08-18 22:20:58 +03:00

2010-03-22-empty-baseclass.ll

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assume-explosion.ll

Revert "[NFC] remove explicit default value for strboolattr attribute in tests"

2021-05-24 19:43:40 +02:00

basic.ll

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bitfield-bittests.ll

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d83507-knowledge-retention-bug.ll

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expect.ll

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gdce.ll

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globalaa-retained.ll

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inlining-alignment-assumptions.ll

[LLVM IR] Allow volatile stores to trap.

2021-07-26 10:51:00 -07:00

instcombine-sroa-inttoptr.ll

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lifetime-sanitizer.ll

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loop-rotation-vs-common-code-hoisting.ll

[NewPM] Remove SpeculateAroundPHIs pass

2021-06-15 20:35:55 +03:00

lto-licm.ll

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min-max-abs-cse.ll

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minmax.ll

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openmp-opt-module.ll

[OpenMP] Create custom state machines for generic target regions

2021-07-10 17:57:08 -05:00

partialord-ule.ll

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pr32544.ll

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pr36760.ll

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pr39282.ll

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pr40750.ll

[NFC] Added testcase for PR40750

2021-09-02 22:44:03 +02:00

pr44461-br-to-switch-rotate.ll

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pr45682.ll

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pr45687.ll

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PR6627.ll

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reassociate-after-unroll.ll

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rotate.ll

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scev-custom-dl.ll

[ScalarEvolution] Ensure backedge-taken counts are not pointers.

2021-06-21 16:24:16 -07:00

scev.ll

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simplifycfg-options.ll

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two-shifts-by-sext.ll

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unsigned-multiply-overflow-check.ll

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vector-trunc-inseltpoison.ll

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vector-trunc.ll

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