d7378259aa
This function is called when some predecessor of an empty return block ends with a conditional branch, with both successors being empty ret blocks. Now, because of the way SimplifyCFG works, it might happen to simplify one of the blocks in a way that makes a conditional branch into an unconditional one, since it's destinations are now identical, but it might not have actually simplified said conditional branch into an unconditional one yet. So, we have to check that ourselves first, especially now that SimplifyCFG aggressively tail-merges all ret and resume blocks. Even if it was an unconditional branch already, `SimplifyCFGOpt::simplifyReturn()` doesn't call `FoldReturnIntoUncondBranch()` by default.
99 lines
4.2 KiB
LLVM
99 lines
4.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
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; In PR17073 ( http://llvm.org/pr17073 ), we illegally hoisted an operation that can trap.
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; The first test confirms that we don't do that when the trapping op is reached by the current BB (block1).
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; The second test confirms that we don't do that when the trapping op is reached by the previous BB (entry).
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; The third test confirms that we can still do this optimization for an operation (add) that doesn't trap.
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; The tests must be complicated enough to prevent previous SimplifyCFG actions from optimizing away
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; the instructions that we're checking for.
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target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
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target triple = "i386-apple-macosx10.9.0"
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@a = common global i32 0, align 4
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@b = common global i8 0, align 1
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define i32* @can_trap1() {
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; CHECK-LABEL: @can_trap1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
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; CHECK-NEXT: br i1 [[TOBOOL]], label [[EXIT:%.*]], label [[BLOCK1:%.*]]
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; CHECK: block1:
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; CHECK-NEXT: br i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a), label [[EXIT]], label [[BLOCK2:%.*]]
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; CHECK: block2:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32* [ null, [[ENTRY:%.*]] ], [ null, [[BLOCK2]] ], [ select (i1 icmp eq (i64 urem (i64 2, i64 zext (i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a) to i64)), i64 0), i32* null, i32* @a), [[BLOCK1]] ]
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; CHECK-NEXT: ret i32* [[STOREMERGE]]
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;
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entry:
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%0 = load i32, i32* @a, align 4
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%tobool = icmp eq i32 %0, 0
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br i1 %tobool, label %exit, label %block1
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block1:
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br i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a), label %exit, label %block2
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block2:
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br label %exit
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exit:
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%storemerge = phi i32* [ null, %entry ],[ null, %block2 ], [ select (i1 icmp eq (i64 urem (i64 2, i64 zext (i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a) to i64)), i64 0), i32* null, i32* @a), %block1 ]
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ret i32* %storemerge
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}
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define i32* @can_trap2() {
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; CHECK-LABEL: @can_trap2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
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; CHECK-NEXT: br i1 [[TOBOOL]], label [[EXIT:%.*]], label [[BLOCK1:%.*]]
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; CHECK: block1:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32* [ select (i1 icmp eq (i64 urem (i64 2, i64 zext (i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a) to i64)), i64 0), i32* null, i32* @a), [[ENTRY:%.*]] ], [ null, [[BLOCK1]] ]
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; CHECK-NEXT: ret i32* [[STOREMERGE]]
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;
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entry:
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%0 = load i32, i32* @a, align 4
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%tobool = icmp eq i32 %0, 0
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br i1 %tobool, label %exit, label %block1
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block1:
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br i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a), label %exit, label %block2
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block2:
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br label %exit
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exit:
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%storemerge = phi i32* [ select (i1 icmp eq (i64 urem (i64 2, i64 zext (i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a) to i64)), i64 0), i32* null, i32* @a), %entry ],[ null, %block2 ], [ null, %block1 ]
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ret i32* %storemerge
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}
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define i32* @cannot_trap() {
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; CHECK-LABEL: @cannot_trap(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a), i32* select (i1 icmp eq (i64 add (i64 zext (i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a) to i64), i64 2), i64 0), i32* null, i32* @a), i32* null
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; CHECK-NEXT: [[STOREMERGE:%.*]] = select i1 [[TOBOOL]], i32* null, i32* [[SPEC_SELECT]]
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; CHECK-NEXT: ret i32* [[STOREMERGE]]
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;
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entry:
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%0 = load i32, i32* @a, align 4
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%tobool = icmp eq i32 %0, 0
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br i1 %tobool, label %exit, label %block1
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block1:
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br i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a), label %exit, label %block2
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block2:
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br label %exit
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exit:
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%storemerge = phi i32* [ null, %entry ],[ null, %block2 ], [ select (i1 icmp eq (i64 add (i64 2, i64 zext (i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a) to i64)), i64 0), i32* null, i32* @a), %block1 ]
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ret i32* %storemerge
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}
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