d7378259aa
This function is called when some predecessor of an empty return block ends with a conditional branch, with both successors being empty ret blocks. Now, because of the way SimplifyCFG works, it might happen to simplify one of the blocks in a way that makes a conditional branch into an unconditional one, since it's destinations are now identical, but it might not have actually simplified said conditional branch into an unconditional one yet. So, we have to check that ourselves first, especially now that SimplifyCFG aggressively tail-merges all ret and resume blocks. Even if it was an unconditional branch already, `SimplifyCFGOpt::simplifyReturn()` doesn't call `FoldReturnIntoUncondBranch()` by default.
69 lines
2.6 KiB
LLVM
69 lines
2.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S < %s | FileCheck %s
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declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #1
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define i32 @f(i32 %a, i32 %b) #0 {
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; CHECK-LABEL: @f(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[UADD:%.*]] = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 [[B:%.*]])
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; CHECK-NEXT: [[CMP:%.*]] = extractvalue { i32, i1 } [[UADD]], 1
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; CHECK-NEXT: [[TMP0:%.*]] = extractvalue { i32, i1 } [[UADD]], 0
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[CMP]], i32 0, i32 [[TMP0]]
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; CHECK-NEXT: ret i32 [[SPEC_SELECT]]
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;
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entry:
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%uadd = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)
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%cmp = extractvalue { i32, i1 } %uadd, 1
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br i1 %cmp, label %return, label %if.end
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if.end: ; preds = %entry
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%0 = extractvalue { i32, i1 } %uadd, 0
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br label %return
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return: ; preds = %entry, %if.end
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%retval.0 = phi i32 [ %0, %if.end ], [ 0, %entry ]
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ret i32 %retval.0
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}
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define i1 @PR32078(<4 x i32> %a, <4 x i32> %b) {
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; CHECK-LABEL: @PR32078(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[CMP0:%.*]] = extractelement <4 x i1> [[CMP]], i32 0
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; CHECK-NEXT: [[CMP1:%.*]] = extractelement <4 x i1> [[CMP]], i32 1
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; CHECK-NEXT: [[CMP2:%.*]] = extractelement <4 x i1> [[CMP]], i32 2
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; CHECK-NEXT: [[CMP3:%.*]] = extractelement <4 x i1> [[CMP]], i32 3
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; CHECK-NEXT: [[CMP0_NOT:%.*]] = xor i1 [[CMP0]], true
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; CHECK-NEXT: [[CMP1_NOT:%.*]] = xor i1 [[CMP1]], true
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; CHECK-NEXT: [[BRMERGE:%.*]] = select i1 [[CMP0_NOT]], i1 true, i1 [[CMP1_NOT]]
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; CHECK-NEXT: br i1 [[BRMERGE]], label [[EXIT:%.*]], label [[CMP1_TRUE:%.*]]
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; CHECK: cmp1_true:
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[CMP2]], i1 [[CMP3]], i1 false
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[R:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[SPEC_SELECT]], [[CMP1_TRUE]] ]
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; CHECK-NEXT: ret i1 [[R]]
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;
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entry:
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%cmp = icmp eq <4 x i32> %a, %b
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%cmp0 = extractelement <4 x i1> %cmp, i32 0
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%cmp1 = extractelement <4 x i1> %cmp, i32 1
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%cmp2 = extractelement <4 x i1> %cmp, i32 2
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%cmp3 = extractelement <4 x i1> %cmp, i32 3
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br i1 %cmp0, label %cmp0_true, label %exit
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cmp0_true:
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br i1 %cmp1, label %cmp1_true, label %exit
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cmp1_true:
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br i1 %cmp2, label %cmp2_true, label %exit
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cmp2_true:
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br label %exit
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exit:
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%r = phi i1 [ false, %cmp0_true ], [ false, %cmp1_true ], [ false, %entry ], [ %cmp3, %cmp2_true ]
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ret i1 %r
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}
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