03958680b2
Currently, with the following example,
$ cat t.c
void foo(int a, _Atomic int *b)
{
*b &= a;
}
$ clang --target=bpf -O2 -c -mcpu=v3 t.c
$ llvm-objdump -d t.o
t.o: file format elf64-bpf
Disassembly of section .text:
0000000000000000 <foo>:
0: c3 12 00 00 51 00 00 00 <unknown>
1: 95 00 00 00 00 00 00 00 exit
Basically, the default cpu for llvm-objdump is v1 and it won't be able
to decode insn properly.
If we add --mcpu=v3 to llvm-objdump command line, we will have
$ llvm-objdump -d --mcpu=v3 t.o
t.o: file format elf64-bpf
Disassembly of section .text:
0000000000000000 <foo>:
0: c3 12 00 00 51 00 00 00 w1 = atomic_fetch_and((u32 *)(r2 + 0x0), w1)
1: 95 00 00 00 00 00 00 00 exit
The atomic_fetch_and insn can be decoded properly. Using latest cpu
version --mcpu=v4 can also decode properly like the above --mcpu=v3.
To avoid the above '<unknown>' decoding with common 'llvm-objdump -d
t.o', this patch marked the default cpu for llvm-objdump with the
current highest cpu number v4 in ELFObjectFileBase::tryGetCPUName(). The
cpu number in ELFObjectFileBase::tryGetCPUName() will be adjusted in the
future if cpu number is increased e.g. v5 etc. Such an approach also
aligns with gcc-bpf as discussed in [1].
Six bpf unit tests are affected with this change. I changed test output
for three unit tests and added --mcpu=v1 for the other three unit tests,
to demonstrate the default (cpu v4) behavior and explicit --mcpu=v1
behavior.
[1]
https://lore.kernel.org/bpf/6f32c0a1-9de2-4145-92ea-be025362182f@linux.dev/T/#m0f7e63c390bc8f5a5523e7f2f0537becd4205200
Co-authored-by: Yonghong Song <yonghong.song@linux.dev>
67 lines
1.6 KiB
LLVM
67 lines
1.6 KiB
LLVM
; RUN: llc -mtriple=bpfel -filetype=obj -o - %s | llvm-objdump --no-print-imm-hex --mcpu=v1 -d - | FileCheck %s
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; Source Code:
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; int gbl;
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; int test(int a, int b) {
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; if (a == 2) {
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; gbl = gbl * gbl * 2;
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; goto out;
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; }
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; if (a != b) {
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; gbl = gbl * 4;
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; }
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; out:
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; return gbl;
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; }
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@gbl = common local_unnamed_addr global i32 0, align 4
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define i32 @test(i32, i32) local_unnamed_addr #0 {
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%3 = icmp eq i32 %0, 2
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br i1 %3, label %4, label %8
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; <label>:4: ; preds = %2
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%5 = load i32, ptr @gbl, align 4
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%6 = shl i32 %5, 1
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%7 = mul i32 %6, %5
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br label %13
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; CHECK: r1 <<= 32
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; CHECK: r1 >>= 32
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; CHECK: if r1 != 2 goto +6 <test+0x48>
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; <label>:8: ; preds = %2
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%9 = icmp eq i32 %0, %1
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%10 = load i32, ptr @gbl, align 4
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br i1 %9, label %15, label %11
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; CHECK: r1 = 0 ll
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; CHECK: r0 = *(u32 *)(r1 + 0)
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; CHECK: r0 *= r0
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; CHECK: r0 <<= 1
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; CHECK: goto +7 <test+0x80>
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; <label>:11: ; preds = %8
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%12 = shl nsw i32 %10, 2
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br label %13
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; CHECK: r3 = 0 ll
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; CHECK: r0 = *(u32 *)(r3 + 0)
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; CHECK: r2 <<= 32
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; CHECK: r2 >>= 32
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; CHECK: if r1 == r2 goto +4 <test+0x98>
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; CHECK: r0 <<= 2
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; <label>:13: ; preds = %4, %11
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%14 = phi i32 [ %12, %11 ], [ %7, %4 ]
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store i32 %14, ptr @gbl, align 4
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br label %15
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; CHECK: r1 = 0 ll
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; CHECK: *(u32 *)(r1 + 0) = r0
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; <label>:15: ; preds = %8, %13
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%16 = phi i32 [ %14, %13 ], [ %10, %8 ]
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ret i32 %16
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; CHECK: exit
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}
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attributes #0 = { norecurse nounwind }
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