a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
125 lines
3.2 KiB
LLVM
125 lines
3.2 KiB
LLVM
; Test STOCGs that are presented as selects.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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declare void @foo(ptr)
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; Test with the loaded value first.
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define void @f1(ptr %ptr, i64 %alt, i32 %limit) {
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; CHECK-LABEL: f1:
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; CHECK: clfi %r4, 42
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; CHECK: stocghe %r3, 0(%r2)
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; CHECK: br %r14
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%cond = icmp ult i32 %limit, 42
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%orig = load i64, ptr %ptr
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%res = select i1 %cond, i64 %orig, i64 %alt
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store i64 %res, ptr %ptr
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ret void
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}
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; ...and with the loaded value second
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define void @f2(ptr %ptr, i64 %alt, i32 %limit) {
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; CHECK-LABEL: f2:
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; CHECK: clfi %r4, 42
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; CHECK: stocgl %r3, 0(%r2)
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; CHECK: br %r14
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%cond = icmp ult i32 %limit, 42
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%orig = load i64, ptr %ptr
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%res = select i1 %cond, i64 %alt, i64 %orig
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store i64 %res, ptr %ptr
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ret void
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}
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; Check the high end of the aligned STOCG range.
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define void @f3(ptr %base, i64 %alt, i32 %limit) {
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; CHECK-LABEL: f3:
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; CHECK: clfi %r4, 42
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; CHECK: stocghe %r3, 524280(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, ptr %base, i64 65535
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%cond = icmp ult i32 %limit, 42
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%orig = load i64, ptr %ptr
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%res = select i1 %cond, i64 %orig, i64 %alt
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store i64 %res, ptr %ptr
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ret void
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}
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; Check the next doubleword up. Other sequences besides this one would be OK.
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define void @f4(ptr %base, i64 %alt, i32 %limit) {
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; CHECK-LABEL: f4:
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; CHECK: agfi %r2, 524288
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; CHECK: clfi %r4, 42
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; CHECK: stocghe %r3, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, ptr %base, i64 65536
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%cond = icmp ult i32 %limit, 42
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%orig = load i64, ptr %ptr
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%res = select i1 %cond, i64 %orig, i64 %alt
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store i64 %res, ptr %ptr
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ret void
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}
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; Check the low end of the STOCG range.
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define void @f5(ptr %base, i64 %alt, i32 %limit) {
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; CHECK-LABEL: f5:
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; CHECK: clfi %r4, 42
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; CHECK: stocghe %r3, -524288(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, ptr %base, i64 -65536
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%cond = icmp ult i32 %limit, 42
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%orig = load i64, ptr %ptr
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%res = select i1 %cond, i64 %orig, i64 %alt
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store i64 %res, ptr %ptr
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ret void
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}
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; Check the next doubleword down, with the same comments as f4.
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define void @f6(ptr %base, i64 %alt, i32 %limit) {
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; CHECK-LABEL: f6:
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; CHECK: agfi %r2, -524296
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; CHECK: clfi %r4, 42
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; CHECK: stocghe %r3, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, ptr %base, i64 -65537
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%cond = icmp ult i32 %limit, 42
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%orig = load i64, ptr %ptr
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%res = select i1 %cond, i64 %orig, i64 %alt
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store i64 %res, ptr %ptr
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ret void
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}
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; Try a frame index base.
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define void @f7(i64 %alt, i32 %limit) {
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; CHECK-LABEL: f7:
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; CHECK: brasl %r14, foo@PLT
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; CHECK: stocghe {{%r[0-9]+}}, {{[0-9]+}}(%r15)
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; CHECK: brasl %r14, foo@PLT
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; CHECK: br %r14
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%ptr = alloca i64
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call void @foo(ptr %ptr)
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%cond = icmp ult i32 %limit, 42
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%orig = load i64, ptr %ptr
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%res = select i1 %cond, i64 %orig, i64 %alt
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store i64 %res, ptr %ptr
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call void @foo(ptr %ptr)
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ret void
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}
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; Test that conditionally-executed stores do not use STOC, since STOC
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; is allowed to trap even when the condition is false.
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define void @f8(i64 %a, i64 %b, ptr %dest) {
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; CHECK-LABEL: f8:
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; CHECK-NOT: stocg %r3, 0(%r4)
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; CHECK: br %r14
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entry:
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%cmp = icmp ule i64 %a, %b
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br i1 %cmp, label %store, label %exit
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store:
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store i64 %b, ptr %dest
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br label %exit
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exit:
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ret void
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}
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