a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
117 lines
3.1 KiB
LLVM
117 lines
3.1 KiB
LLVM
; Test that compares are omitted if CC already has the right value
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; (z196 version).
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 -no-integrated-as | FileCheck %s
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; Addition provides enough for comparisons with zero if we know no
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; signed overflow happens, which is when the "nsw" flag is set.
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; First test the EQ case with LOC.
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define i32 @f1(i32 %a, i32 %b, ptr %cptr) {
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; CHECK-LABEL: f1:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: loce %r3, 0(%r4)
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; CHECK: br %r14
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%add = add nsw i32 %a, 1000000
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%cmp = icmp eq i32 %add, 0
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%c = load i32, ptr %cptr
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%arg = select i1 %cmp, i32 %c, i32 %b
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call void asm sideeffect "blah $0", "{r3}"(i32 %arg)
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ret i32 %add
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}
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; ...and again with STOC.
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define i32 @f2(i32 %a, i32 %b, ptr %cptr) {
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; CHECK-LABEL: f2:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: stoce %r3, 0(%r4)
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; CHECK: br %r14
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%add = add nsw i32 %a, 1000000
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%cmp = icmp eq i32 %add, 0
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%c = load i32, ptr %cptr
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%newval = select i1 %cmp, i32 %b, i32 %c
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store i32 %newval, ptr %cptr
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ret i32 %add
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}
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; Reverse the select order and test with LOCR.
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define i32 @f3(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: f3:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: locrlh %r3, %r4
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; CHECK: br %r14
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%add = add nsw i32 %a, 1000000
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%cmp = icmp eq i32 %add, 0
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%arg = select i1 %cmp, i32 %b, i32 %c
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call void asm sideeffect "blah $0", "{r3}"(i32 %arg)
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ret i32 %add
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}
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; ...and again with LOC.
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define i32 @f4(i32 %a, i32 %b, ptr %cptr) {
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; CHECK-LABEL: f4:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: loclh %r3, 0(%r4)
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; CHECK: br %r14
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%add = add nsw i32 %a, 1000000
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%cmp = icmp eq i32 %add, 0
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%c = load i32, ptr %cptr
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%arg = select i1 %cmp, i32 %b, i32 %c
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call void asm sideeffect "blah $0", "{r3}"(i32 %arg)
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ret i32 %add
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}
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; ...and again with STOC.
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define i32 @f5(i32 %a, i32 %b, ptr %cptr) {
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; CHECK-LABEL: f5:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: stoclh %r3, 0(%r4)
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; CHECK: br %r14
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%add = add nsw i32 %a, 1000000
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%cmp = icmp eq i32 %add, 0
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%c = load i32, ptr %cptr
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%newval = select i1 %cmp, i32 %c, i32 %b
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store i32 %newval, ptr %cptr
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ret i32 %add
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}
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; Change the EQ in f3 to NE.
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define i32 @f6(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: f6:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: locre %r3, %r4
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; CHECK: br %r14
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%add = add nsw i32 %a, 1000000
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%cmp = icmp ne i32 %add, 0
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%arg = select i1 %cmp, i32 %b, i32 %c
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call void asm sideeffect "blah $0", "{r3}"(i32 %arg)
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ret i32 %add
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}
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; ...and again with LOC.
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define i32 @f7(i32 %a, i32 %b, ptr %cptr) {
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; CHECK-LABEL: f7:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: loce %r3, 0(%r4)
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; CHECK: br %r14
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%add = add nsw i32 %a, 1000000
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%cmp = icmp ne i32 %add, 0
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%c = load i32, ptr %cptr
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%arg = select i1 %cmp, i32 %b, i32 %c
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call void asm sideeffect "blah $0", "{r3}"(i32 %arg)
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ret i32 %add
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}
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; ...and again with STOC.
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define i32 @f8(i32 %a, i32 %b, ptr %cptr) {
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; CHECK-LABEL: f8:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: stoce %r3, 0(%r4)
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; CHECK: br %r14
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%add = add nsw i32 %a, 1000000
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%cmp = icmp ne i32 %add, 0
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%c = load i32, ptr %cptr
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%newval = select i1 %cmp, i32 %c, i32 %b
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store i32 %newval, ptr %cptr
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ret i32 %add
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}
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