6334d0af3b
The issue is in LoopAccessAnalysis, but the regression was seen in the user LoopVersioning. Hence, add pre-commit tests for both, in preparation to fix the issue in LoopAccessAnalysis.
79 lines
3.9 KiB
LLVM
79 lines
3.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -passes=loop-versioning -S %s | FileCheck %s
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define void @lver.check.unnecessary(ptr %arg, ptr %arg1, i1 %arg2) {
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; CHECK-LABEL: define void @lver.check.unnecessary(
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; CHECK-SAME: ptr [[ARG:%.*]], ptr [[ARG1:%.*]], i1 [[ARG2:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[ARG]], align 4
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; CHECK-NEXT: br i1 [[ARG2]], label %[[NOLOOP_EXIT:.*]], label %[[LOOP_BODY_LVER_CHECK:.*]]
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; CHECK: [[LOOP_BODY_LVER_CHECK]]:
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; CHECK-NEXT: [[SEXT7:%.*]] = sext i32 [[LOAD]] to i64
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; CHECK-NEXT: [[GEP8:%.*]] = getelementptr i8, ptr [[ARG1]], i64 8
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; CHECK-NEXT: [[IDENT_CHECK:%.*]] = icmp ne i32 [[LOAD]], 1
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; CHECK-NEXT: br i1 [[IDENT_CHECK]], label %[[LOOP_BODY_PH_LVER_ORIG:.*]], label %[[LOOP_BODY_PH:.*]]
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; CHECK: [[LOOP_BODY_PH_LVER_ORIG]]:
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; CHECK-NEXT: br label %[[LOOP_BODY_LVER_ORIG:.*]]
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; CHECK: [[LOOP_BODY_LVER_ORIG]]:
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; CHECK-NEXT: [[PHI_LVER_ORIG:%.*]] = phi i64 [ 0, %[[LOOP_BODY_PH_LVER_ORIG]] ], [ [[ADD_LVER_ORIG:%.*]], %[[LOOP_BODY_LVER_ORIG]] ]
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; CHECK-NEXT: [[MUL_LVER_ORIG:%.*]] = mul i64 [[PHI_LVER_ORIG]], [[SEXT7]]
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; CHECK-NEXT: [[GEP10_LVER_ORIG:%.*]] = getelementptr double, ptr [[GEP8]], i64 [[MUL_LVER_ORIG]]
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; CHECK-NEXT: [[LOAD11_LVER_ORIG:%.*]] = load double, ptr [[GEP10_LVER_ORIG]], align 8
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; CHECK-NEXT: store double [[LOAD11_LVER_ORIG]], ptr [[ARG1]], align 8
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; CHECK-NEXT: [[ADD_LVER_ORIG]] = add i64 [[PHI_LVER_ORIG]], 1
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; CHECK-NEXT: [[ICMP_LVER_ORIG:%.*]] = icmp eq i64 [[PHI_LVER_ORIG]], 0
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; CHECK-NEXT: br i1 [[ICMP_LVER_ORIG]], label %[[LOOP_EXIT_LOOPEXIT:.*]], label %[[LOOP_BODY_LVER_ORIG]]
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; CHECK: [[LOOP_BODY_PH]]:
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; CHECK-NEXT: br label %[[LOOP_BODY:.*]]
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; CHECK: [[LOOP_BODY]]:
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; CHECK-NEXT: [[PHI:%.*]] = phi i64 [ 0, %[[LOOP_BODY_PH]] ], [ [[ADD:%.*]], %[[LOOP_BODY]] ]
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; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[PHI]], [[SEXT7]]
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; CHECK-NEXT: [[GEP10:%.*]] = getelementptr double, ptr [[GEP8]], i64 [[MUL]]
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; CHECK-NEXT: [[LOAD11:%.*]] = load double, ptr [[GEP10]], align 8
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; CHECK-NEXT: store double [[LOAD11]], ptr [[ARG1]], align 8
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; CHECK-NEXT: [[ADD]] = add i64 [[PHI]], 1
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; CHECK-NEXT: [[ICMP:%.*]] = icmp eq i64 [[PHI]], 0
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; CHECK-NEXT: br i1 [[ICMP]], label %[[LOOP_EXIT_LOOPEXIT1:.*]], label %[[LOOP_BODY]]
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; CHECK: [[NOLOOP_EXIT]]:
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; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[LOAD]] to i64
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr double, ptr [[ARG1]], i64 [[SEXT]]
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; CHECK-NEXT: [[LOAD5:%.*]] = load double, ptr [[GEP]], align 8
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; CHECK-NEXT: store double [[LOAD5]], ptr [[ARG]], align 8
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; CHECK-NEXT: ret void
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; CHECK: [[LOOP_EXIT_LOOPEXIT]]:
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; CHECK-NEXT: br label %[[LOOP_EXIT:.*]]
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; CHECK: [[LOOP_EXIT_LOOPEXIT1]]:
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; CHECK-NEXT: br label %[[LOOP_EXIT]]
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; CHECK: [[LOOP_EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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%load = load i32, ptr %arg, align 4
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br i1 %arg2, label %noloop.exit, label %loop.ph
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loop.ph: ; preds = %entry
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%sext7 = sext i32 %load to i64
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%gep8 = getelementptr i8, ptr %arg1, i64 8
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br label %loop.body
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loop.body: ; preds = %loop.body, %loop.ph
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%phi = phi i64 [ 0, %loop.ph ], [ %add, %loop.body ]
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%mul = mul i64 %phi, %sext7
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%gep10 = getelementptr double, ptr %gep8, i64 %mul
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%load11 = load double, ptr %gep10, align 8
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store double %load11, ptr %arg1, align 8
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%add = add i64 %phi, 1
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%icmp = icmp eq i64 %phi, 0
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br i1 %icmp, label %loop.exit, label %loop.body
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noloop.exit: ; preds = %entry
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%sext = sext i32 %load to i64
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%gep = getelementptr double, ptr %arg1, i64 %sext
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%load5 = load double, ptr %gep, align 8
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store double %load5, ptr %arg, align 8
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ret void
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loop.exit: ; preds = %loop.body
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ret void
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}
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