Shih-Po Hung 837ee5b46a [RISCV][TTI] Scale the cost of FP-Int conversion with LMUL (#87506) ...

Widening/narrowing the source data type to match the destination data
type may require multiple steps.
To model the costs, the patch generated the interim type by following
the logic in RISCVTargetLowering::lowerVPFPIntConvOp.

2024-09-02 09:38:42 +08:00

..

AArch64

[TTI] Add cost model support for [u|s]cmp (#106824)

2024-08-31 21:25:04 +08:00

AMDGPU

AMDGPU: Correct costs of saturating add/sub intrinsics (#100808)

2024-08-09 12:55:15 +04:00

ARM

TTI: Check legalization cost of add/sub overflow ISD nodes (#100518)

2024-08-08 23:44:07 +04:00

PowerPC

[PowerPC] adjust cost for extract i64 from vector on P9 and above (#82963)

2024-03-04 09:37:11 +08:00

RISCV

[RISCV][TTI] Scale the cost of FP-Int conversion with LMUL (#87506)

2024-09-02 09:38:42 +08:00

SystemZ

[SystemZ] Add custom handling of legal vectors with reduce-add. (#88495)

2024-04-12 18:05:30 +02:00

X86

[TTI] Add cost model support for [u|s]cmp (#106824)

2024-08-31 21:25:04 +08:00

free-intrinsics-datalayout.ll

[CostModel] No cost for llvm.allow.{runtime,ubsan}.check() (#86064)

2024-03-31 22:27:57 -07:00

free-intrinsics-no_info.ll

[CostModel] No cost for llvm.allow.{runtime,ubsan}.check() (#86064)

2024-03-31 22:27:57 -07:00

no_info.ll

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