678d8946ba
- [Clang] Declare AMDGPU target as supporting BF16 for storage-only purposes on amdgcn - Add Sema & CodeGen tests cases. - Also add cases that D138651 would have covered as this patch replaces it. - [AMDGPU] Add BF16 storage-only support - Support legalization/dealing with bf16 operations in DAGIsel. - bf16 as a type remains illegal and is represented as i16 for storage purposes. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D139398
33 lines
1011 B
LLVM
33 lines
1011 B
LLVM
; RUN: not llc < %s -march=amdgcn -mcpu=hawaii
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; RUN: not llc < %s -march=amdgcn -mcpu=tonga
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; RUN: not llc < %s -march=amdgcn -mcpu=gfx900
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; RUN: not llc < %s -march=amdgcn -mcpu=gfx1010
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; TODO: Add GlobalISel tests, currently it silently miscompiles as GISel does not handle BF16 at all.
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; We only have storage-only BF16 support so check codegen fails if we attempt to do operations on bfloats.
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define void @test_fneg(bfloat %a, ptr addrspace(1) %out) {
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%result = fneg bfloat %a
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store bfloat %result, ptr addrspace(1) %out
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ret void
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}
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define void @test_fabs(bfloat %a, ptr addrspace(1) %out) {
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%result = fabs bfloat %a
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store bfloat %result, ptr addrspace(1) %out
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ret void
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}
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define void @test_add(bfloat %a, bfloat %b, ptr addrspace(1) %out) {
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%result = fadd bfloat %a, %b
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store bfloat %result, ptr addrspace(1) %out
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ret void
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}
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define void @test_mul(bfloat %a, bfloat %b, ptr addrspace(1) %out) {
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%result = fmul bfloat %a, %b
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store bfloat %result, ptr addrspace(1) %out
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ret void
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}
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