687e0e205e
This was introducing transient UB by using the default alignment of a larger vector type.
23 lines
1.0 KiB
LLVM
23 lines
1.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -mtriple=amdgcn-- -mcpu=fiji -data-layout=A5 -passes=amdgpu-promote-alloca < %s | FileCheck -check-prefix=OPT %s
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define i64 @test_pointer_array(i64 %v) {
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; OPT-LABEL: @test_pointer_array(
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; OPT-NEXT: entry:
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; OPT-NEXT: [[A:%.*]] = alloca [3 x ptr], align 16, addrspace(5)
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; OPT-NEXT: [[TMP0:%.*]] = load <3 x ptr>, ptr addrspace(5) [[A]], align 16
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; OPT-NEXT: [[TMP1:%.*]] = inttoptr i64 [[V:%.*]] to ptr
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; OPT-NEXT: [[TMP2:%.*]] = insertelement <3 x ptr> [[TMP0]], ptr [[TMP1]], i32 0
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; OPT-NEXT: store <3 x ptr> [[TMP2]], ptr addrspace(5) [[A]], align 16
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; OPT-NEXT: [[TMP3:%.*]] = load <3 x ptr>, ptr addrspace(5) [[A]], align 16
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; OPT-NEXT: [[TMP4:%.*]] = extractelement <3 x ptr> [[TMP3]], i32 0
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; OPT-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64
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; OPT-NEXT: ret i64 [[TMP5]]
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;
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entry:
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%a = alloca [3 x ptr], align 16, addrspace(5)
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store i64 %v, ptr addrspace(5) %a, align 16
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%ld = load i64, ptr addrspace(5) %a, align 16
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ret i64 %ld
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}
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