fb73eb0324
This fixes PR32471. As comment 10 on that bug report highlights (https://bugs.llvm.org//show_bug.cgi?id=32471#c10), there are quite a few different defendable design tradeoffs that could be made, including not representing pointers at all in LLT. I decided to go for representing vector-of-pointer as a concept in LLT, while keeping the size of the LLT type 64 bits (this is an increase from 48 bits before). My rationale for keeping pointers explicit is that on some targets probably it's very handy to have the distinction between pointer and non-pointer (e.g. 68K has a different register bank for pointers IIRC). If we keep a scalar pointer, it probably is easiest to also have a vector-of-pointers to keep LLT relatively conceptually clean and orthogonal, while we don't have a very strong reason to break that orthogonality. Once we gain more experience on the use of LLT, we can of course reconsider this direction. Rejecting vector-of-pointer types in the IRTranslator is also an option to avoid the crash reported in PR32471, but that is only a very short-term solution; also needs quite a bit of code tweaks in places, and is probably fragile. Therefore I didn't consider this the best option. llvm-svn: 300535
647 lines
23 KiB
C++
647 lines
23 KiB
C++
//===-- llvm/CodeGen/GlobalISel/MachineIRBuilder.cpp - MIBuilder--*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the MachineIRBuidler class.
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/IR/DebugInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetOpcodes.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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using namespace llvm;
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void MachineIRBuilder::setMF(MachineFunction &MF) {
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this->MF = &MF;
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this->MBB = nullptr;
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this->MRI = &MF.getRegInfo();
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this->TII = MF.getSubtarget().getInstrInfo();
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this->DL = DebugLoc();
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this->II = MachineBasicBlock::iterator();
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this->InsertedInstr = nullptr;
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}
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void MachineIRBuilder::setMBB(MachineBasicBlock &MBB) {
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this->MBB = &MBB;
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this->II = MBB.end();
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assert(&getMF() == MBB.getParent() &&
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"Basic block is in a different function");
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}
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void MachineIRBuilder::setInstr(MachineInstr &MI) {
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assert(MI.getParent() && "Instruction is not part of a basic block");
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setMBB(*MI.getParent());
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this->II = MI.getIterator();
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}
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void MachineIRBuilder::setInsertPt(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator II) {
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assert(MBB.getParent() == &getMF() &&
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"Basic block is in a different function");
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this->MBB = &MBB;
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this->II = II;
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}
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void MachineIRBuilder::recordInsertions(
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std::function<void(MachineInstr *)> Inserted) {
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InsertedInstr = std::move(Inserted);
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}
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void MachineIRBuilder::stopRecordingInsertions() {
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InsertedInstr = nullptr;
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}
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//------------------------------------------------------------------------------
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// Build instruction variants.
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//------------------------------------------------------------------------------
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MachineInstrBuilder MachineIRBuilder::buildInstr(unsigned Opcode) {
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return insertInstr(buildInstrNoInsert(Opcode));
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}
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MachineInstrBuilder MachineIRBuilder::buildInstrNoInsert(unsigned Opcode) {
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MachineInstrBuilder MIB = BuildMI(getMF(), DL, getTII().get(Opcode));
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return MIB;
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}
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MachineInstrBuilder MachineIRBuilder::insertInstr(MachineInstrBuilder MIB) {
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getMBB().insert(getInsertPt(), MIB);
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if (InsertedInstr)
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InsertedInstr(MIB);
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return MIB;
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}
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MachineInstrBuilder MachineIRBuilder::buildDirectDbgValue(
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unsigned Reg, const MDNode *Variable, const MDNode *Expr) {
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assert(isa<DILocalVariable>(Variable) && "not a variable");
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assert(cast<DIExpression>(Expr)->isValid() && "not an expression");
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assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) &&
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"Expected inlined-at fields to agree");
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return buildInstr(TargetOpcode::DBG_VALUE)
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.addReg(Reg, RegState::Debug)
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.addReg(0, RegState::Debug)
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.addMetadata(Variable)
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.addMetadata(Expr);
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}
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MachineInstrBuilder MachineIRBuilder::buildIndirectDbgValue(
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unsigned Reg, unsigned Offset, const MDNode *Variable, const MDNode *Expr) {
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assert(isa<DILocalVariable>(Variable) && "not a variable");
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assert(cast<DIExpression>(Expr)->isValid() && "not an expression");
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assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) &&
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"Expected inlined-at fields to agree");
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return buildInstr(TargetOpcode::DBG_VALUE)
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.addReg(Reg, RegState::Debug)
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.addImm(Offset)
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.addMetadata(Variable)
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.addMetadata(Expr);
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}
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MachineInstrBuilder MachineIRBuilder::buildFIDbgValue(int FI,
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const MDNode *Variable,
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const MDNode *Expr) {
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assert(isa<DILocalVariable>(Variable) && "not a variable");
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assert(cast<DIExpression>(Expr)->isValid() && "not an expression");
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assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) &&
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"Expected inlined-at fields to agree");
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return buildInstr(TargetOpcode::DBG_VALUE)
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.addFrameIndex(FI)
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.addImm(0)
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.addMetadata(Variable)
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.addMetadata(Expr);
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}
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MachineInstrBuilder MachineIRBuilder::buildConstDbgValue(const Constant &C,
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unsigned Offset,
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const MDNode *Variable,
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const MDNode *Expr) {
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assert(isa<DILocalVariable>(Variable) && "not a variable");
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assert(cast<DIExpression>(Expr)->isValid() && "not an expression");
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assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) &&
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"Expected inlined-at fields to agree");
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auto MIB = buildInstr(TargetOpcode::DBG_VALUE);
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if (auto *CI = dyn_cast<ConstantInt>(&C)) {
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if (CI->getBitWidth() > 64)
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MIB.addCImm(CI);
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else
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MIB.addImm(CI->getZExtValue());
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} else if (auto *CFP = dyn_cast<ConstantFP>(&C)) {
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MIB.addFPImm(CFP);
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} else {
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// Insert %noreg if we didn't find a usable constant and had to drop it.
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MIB.addReg(0U);
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}
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return MIB.addImm(Offset).addMetadata(Variable).addMetadata(Expr);
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}
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MachineInstrBuilder MachineIRBuilder::buildFrameIndex(unsigned Res, int Idx) {
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assert(MRI->getType(Res).isPointer() && "invalid operand type");
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return buildInstr(TargetOpcode::G_FRAME_INDEX)
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.addDef(Res)
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.addFrameIndex(Idx);
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}
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MachineInstrBuilder MachineIRBuilder::buildGlobalValue(unsigned Res,
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const GlobalValue *GV) {
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assert(MRI->getType(Res).isPointer() && "invalid operand type");
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assert(MRI->getType(Res).getAddressSpace() ==
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GV->getType()->getAddressSpace() &&
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"address space mismatch");
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return buildInstr(TargetOpcode::G_GLOBAL_VALUE)
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.addDef(Res)
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.addGlobalAddress(GV);
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}
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MachineInstrBuilder MachineIRBuilder::buildAdd(unsigned Res, unsigned Op0,
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unsigned Op1) {
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assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) &&
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"invalid operand type");
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assert(MRI->getType(Res) == MRI->getType(Op0) &&
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MRI->getType(Res) == MRI->getType(Op1) && "type mismatch");
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return buildInstr(TargetOpcode::G_ADD)
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.addDef(Res)
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.addUse(Op0)
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.addUse(Op1);
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}
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MachineInstrBuilder MachineIRBuilder::buildGEP(unsigned Res, unsigned Op0,
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unsigned Op1) {
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assert(MRI->getType(Res).isPointer() &&
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MRI->getType(Res) == MRI->getType(Op0) && "type mismatch");
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assert(MRI->getType(Op1).isScalar() && "invalid offset type");
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return buildInstr(TargetOpcode::G_GEP)
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.addDef(Res)
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.addUse(Op0)
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.addUse(Op1);
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}
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MachineInstrBuilder MachineIRBuilder::buildPtrMask(unsigned Res, unsigned Op0,
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uint32_t NumBits) {
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assert(MRI->getType(Res).isPointer() &&
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MRI->getType(Res) == MRI->getType(Op0) && "type mismatch");
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return buildInstr(TargetOpcode::G_PTR_MASK)
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.addDef(Res)
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.addUse(Op0)
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.addImm(NumBits);
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}
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MachineInstrBuilder MachineIRBuilder::buildSub(unsigned Res, unsigned Op0,
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unsigned Op1) {
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assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) &&
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"invalid operand type");
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assert(MRI->getType(Res) == MRI->getType(Op0) &&
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MRI->getType(Res) == MRI->getType(Op1) && "type mismatch");
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return buildInstr(TargetOpcode::G_SUB)
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.addDef(Res)
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.addUse(Op0)
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.addUse(Op1);
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}
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MachineInstrBuilder MachineIRBuilder::buildMul(unsigned Res, unsigned Op0,
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unsigned Op1) {
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assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) &&
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"invalid operand type");
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assert(MRI->getType(Res) == MRI->getType(Op0) &&
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MRI->getType(Res) == MRI->getType(Op1) && "type mismatch");
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return buildInstr(TargetOpcode::G_MUL)
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.addDef(Res)
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.addUse(Op0)
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.addUse(Op1);
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}
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MachineInstrBuilder MachineIRBuilder::buildAnd(unsigned Res, unsigned Op0,
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unsigned Op1) {
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assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) &&
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"invalid operand type");
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assert(MRI->getType(Res) == MRI->getType(Op0) &&
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MRI->getType(Res) == MRI->getType(Op1) && "type mismatch");
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return buildInstr(TargetOpcode::G_AND)
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.addDef(Res)
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.addUse(Op0)
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.addUse(Op1);
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}
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MachineInstrBuilder MachineIRBuilder::buildBr(MachineBasicBlock &Dest) {
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return buildInstr(TargetOpcode::G_BR).addMBB(&Dest);
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}
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MachineInstrBuilder MachineIRBuilder::buildBrIndirect(unsigned Tgt) {
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return buildInstr(TargetOpcode::G_BRINDIRECT).addUse(Tgt);
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}
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MachineInstrBuilder MachineIRBuilder::buildCopy(unsigned Res, unsigned Op) {
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return buildInstr(TargetOpcode::COPY).addDef(Res).addUse(Op);
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}
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MachineInstrBuilder MachineIRBuilder::buildConstant(unsigned Res,
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const ConstantInt &Val) {
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LLT Ty = MRI->getType(Res);
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assert((Ty.isScalar() || Ty.isPointer()) && "invalid operand type");
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const ConstantInt *NewVal = &Val;
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if (Ty.getSizeInBits() != Val.getBitWidth())
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NewVal = ConstantInt::get(MF->getFunction()->getContext(),
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Val.getValue().sextOrTrunc(Ty.getSizeInBits()));
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return buildInstr(TargetOpcode::G_CONSTANT).addDef(Res).addCImm(NewVal);
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}
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MachineInstrBuilder MachineIRBuilder::buildConstant(unsigned Res,
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int64_t Val) {
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auto IntN = IntegerType::get(MF->getFunction()->getContext(),
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MRI->getType(Res).getSizeInBits());
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ConstantInt *CI = ConstantInt::get(IntN, Val, true);
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return buildConstant(Res, *CI);
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}
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MachineInstrBuilder MachineIRBuilder::buildFConstant(unsigned Res,
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const ConstantFP &Val) {
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assert(MRI->getType(Res).isScalar() && "invalid operand type");
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return buildInstr(TargetOpcode::G_FCONSTANT).addDef(Res).addFPImm(&Val);
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}
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MachineInstrBuilder MachineIRBuilder::buildBrCond(unsigned Tst,
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MachineBasicBlock &Dest) {
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assert(MRI->getType(Tst).isScalar() && "invalid operand type");
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return buildInstr(TargetOpcode::G_BRCOND).addUse(Tst).addMBB(&Dest);
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}
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MachineInstrBuilder MachineIRBuilder::buildLoad(unsigned Res, unsigned Addr,
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MachineMemOperand &MMO) {
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assert(MRI->getType(Res).isValid() && "invalid operand type");
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assert(MRI->getType(Addr).isPointer() && "invalid operand type");
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return buildInstr(TargetOpcode::G_LOAD)
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.addDef(Res)
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.addUse(Addr)
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.addMemOperand(&MMO);
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}
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MachineInstrBuilder MachineIRBuilder::buildStore(unsigned Val, unsigned Addr,
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MachineMemOperand &MMO) {
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assert(MRI->getType(Val).isValid() && "invalid operand type");
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assert(MRI->getType(Addr).isPointer() && "invalid operand type");
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return buildInstr(TargetOpcode::G_STORE)
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.addUse(Val)
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.addUse(Addr)
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.addMemOperand(&MMO);
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}
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MachineInstrBuilder MachineIRBuilder::buildUAdde(unsigned Res,
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unsigned CarryOut,
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unsigned Op0, unsigned Op1,
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unsigned CarryIn) {
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assert(MRI->getType(Res).isScalar() && "invalid operand type");
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assert(MRI->getType(Res) == MRI->getType(Op0) &&
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MRI->getType(Res) == MRI->getType(Op1) && "type mismatch");
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assert(MRI->getType(CarryOut).isScalar() && "invalid operand type");
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assert(MRI->getType(CarryOut) == MRI->getType(CarryIn) && "type mismatch");
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return buildInstr(TargetOpcode::G_UADDE)
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.addDef(Res)
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.addDef(CarryOut)
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.addUse(Op0)
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.addUse(Op1)
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.addUse(CarryIn);
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}
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MachineInstrBuilder MachineIRBuilder::buildAnyExt(unsigned Res, unsigned Op) {
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validateTruncExt(Res, Op, true);
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return buildInstr(TargetOpcode::G_ANYEXT).addDef(Res).addUse(Op);
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}
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MachineInstrBuilder MachineIRBuilder::buildSExt(unsigned Res, unsigned Op) {
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validateTruncExt(Res, Op, true);
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return buildInstr(TargetOpcode::G_SEXT).addDef(Res).addUse(Op);
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}
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MachineInstrBuilder MachineIRBuilder::buildZExt(unsigned Res, unsigned Op) {
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validateTruncExt(Res, Op, true);
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return buildInstr(TargetOpcode::G_ZEXT).addDef(Res).addUse(Op);
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}
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MachineInstrBuilder MachineIRBuilder::buildSExtOrTrunc(unsigned Res,
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unsigned Op) {
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unsigned Opcode = TargetOpcode::COPY;
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if (MRI->getType(Res).getSizeInBits() > MRI->getType(Op).getSizeInBits())
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Opcode = TargetOpcode::G_SEXT;
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else if (MRI->getType(Res).getSizeInBits() < MRI->getType(Op).getSizeInBits())
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Opcode = TargetOpcode::G_TRUNC;
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return buildInstr(Opcode).addDef(Res).addUse(Op);
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}
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MachineInstrBuilder MachineIRBuilder::buildZExtOrTrunc(unsigned Res,
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unsigned Op) {
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unsigned Opcode = TargetOpcode::COPY;
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if (MRI->getType(Res).getSizeInBits() > MRI->getType(Op).getSizeInBits())
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Opcode = TargetOpcode::G_ZEXT;
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else if (MRI->getType(Res).getSizeInBits() < MRI->getType(Op).getSizeInBits())
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Opcode = TargetOpcode::G_TRUNC;
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return buildInstr(Opcode).addDef(Res).addUse(Op);
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}
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MachineInstrBuilder MachineIRBuilder::buildCast(unsigned Dst, unsigned Src) {
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LLT SrcTy = MRI->getType(Src);
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LLT DstTy = MRI->getType(Dst);
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if (SrcTy == DstTy)
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return buildCopy(Dst, Src);
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unsigned Opcode;
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if (SrcTy.isPointer() && DstTy.isScalar())
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Opcode = TargetOpcode::G_PTRTOINT;
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else if (DstTy.isPointer() && SrcTy.isScalar())
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Opcode = TargetOpcode::G_INTTOPTR;
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else {
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assert(!SrcTy.isPointer() && !DstTy.isPointer() && "n G_ADDRCAST yet");
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Opcode = TargetOpcode::G_BITCAST;
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}
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return buildInstr(Opcode).addDef(Dst).addUse(Src);
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}
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MachineInstrBuilder MachineIRBuilder::buildExtract(unsigned Res, unsigned Src,
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uint64_t Index) {
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#ifndef NDEBUG
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assert(MRI->getType(Src).isValid() && "invalid operand type");
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assert(MRI->getType(Res).isValid() && "invalid operand type");
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assert(Index + MRI->getType(Res).getSizeInBits() <=
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MRI->getType(Src).getSizeInBits() &&
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"extracting off end of register");
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#endif
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if (MRI->getType(Res).getSizeInBits() == MRI->getType(Src).getSizeInBits()) {
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assert(Index == 0 && "insertion past the end of a register");
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return buildCast(Res, Src);
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}
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return buildInstr(TargetOpcode::G_EXTRACT)
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.addDef(Res)
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.addUse(Src)
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.addImm(Index);
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}
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MachineInstrBuilder
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MachineIRBuilder::buildSequence(unsigned Res,
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ArrayRef<unsigned> Ops,
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ArrayRef<uint64_t> Indices) {
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#ifndef NDEBUG
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assert(Ops.size() == Indices.size() && "incompatible args");
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assert(!Ops.empty() && "invalid trivial sequence");
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assert(std::is_sorted(Indices.begin(), Indices.end()) &&
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"sequence offsets must be in ascending order");
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assert(MRI->getType(Res).isValid() && "invalid operand type");
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for (auto Op : Ops)
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assert(MRI->getType(Op).isValid() && "invalid operand type");
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#endif
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MachineInstrBuilder MIB = buildInstr(TargetOpcode::G_SEQUENCE);
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MIB.addDef(Res);
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for (unsigned i = 0; i < Ops.size(); ++i) {
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MIB.addUse(Ops[i]);
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MIB.addImm(Indices[i]);
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}
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return MIB;
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}
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MachineInstrBuilder MachineIRBuilder::buildUndef(unsigned Res) {
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return buildInstr(TargetOpcode::IMPLICIT_DEF).addDef(Res);
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}
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MachineInstrBuilder MachineIRBuilder::buildMerge(unsigned Res,
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ArrayRef<unsigned> Ops) {
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#ifndef NDEBUG
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assert(!Ops.empty() && "invalid trivial sequence");
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LLT Ty = MRI->getType(Ops[0]);
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for (auto Reg : Ops)
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assert(MRI->getType(Reg) == Ty && "type mismatch in input list");
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assert(Ops.size() * MRI->getType(Ops[0]).getSizeInBits() ==
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MRI->getType(Res).getSizeInBits() &&
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"input operands do not cover output register");
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#endif
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MachineInstrBuilder MIB = buildInstr(TargetOpcode::G_MERGE_VALUES);
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MIB.addDef(Res);
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for (unsigned i = 0; i < Ops.size(); ++i)
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MIB.addUse(Ops[i]);
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return MIB;
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}
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MachineInstrBuilder MachineIRBuilder::buildUnmerge(ArrayRef<unsigned> Res,
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unsigned Op) {
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#ifndef NDEBUG
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assert(!Res.empty() && "invalid trivial sequence");
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LLT Ty = MRI->getType(Res[0]);
|
|
for (auto Reg : Res)
|
|
assert(MRI->getType(Reg) == Ty && "type mismatch in input list");
|
|
assert(Res.size() * MRI->getType(Res[0]).getSizeInBits() ==
|
|
MRI->getType(Op).getSizeInBits() &&
|
|
"input operands do not cover output register");
|
|
#endif
|
|
|
|
MachineInstrBuilder MIB = buildInstr(TargetOpcode::G_UNMERGE_VALUES);
|
|
for (unsigned i = 0; i < Res.size(); ++i)
|
|
MIB.addDef(Res[i]);
|
|
MIB.addUse(Op);
|
|
return MIB;
|
|
}
|
|
|
|
MachineInstrBuilder MachineIRBuilder::buildInsert(unsigned Res, unsigned Src,
|
|
unsigned Op, unsigned Index) {
|
|
if (MRI->getType(Res).getSizeInBits() == MRI->getType(Op).getSizeInBits()) {
|
|
assert(Index == 0 && "insertion past the end of a register");
|
|
return buildCast(Res, Op);
|
|
}
|
|
|
|
return buildInstr(TargetOpcode::G_INSERT)
|
|
.addDef(Res)
|
|
.addUse(Src)
|
|
.addUse(Op)
|
|
.addImm(Index);
|
|
}
|
|
|
|
MachineInstrBuilder MachineIRBuilder::buildIntrinsic(Intrinsic::ID ID,
|
|
unsigned Res,
|
|
bool HasSideEffects) {
|
|
auto MIB =
|
|
buildInstr(HasSideEffects ? TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS
|
|
: TargetOpcode::G_INTRINSIC);
|
|
if (Res)
|
|
MIB.addDef(Res);
|
|
MIB.addIntrinsicID(ID);
|
|
return MIB;
|
|
}
|
|
|
|
MachineInstrBuilder MachineIRBuilder::buildTrunc(unsigned Res, unsigned Op) {
|
|
validateTruncExt(Res, Op, false);
|
|
return buildInstr(TargetOpcode::G_TRUNC).addDef(Res).addUse(Op);
|
|
}
|
|
|
|
MachineInstrBuilder MachineIRBuilder::buildFPTrunc(unsigned Res, unsigned Op) {
|
|
validateTruncExt(Res, Op, false);
|
|
return buildInstr(TargetOpcode::G_FPTRUNC).addDef(Res).addUse(Op);
|
|
}
|
|
|
|
MachineInstrBuilder MachineIRBuilder::buildICmp(CmpInst::Predicate Pred,
|
|
unsigned Res, unsigned Op0,
|
|
unsigned Op1) {
|
|
#ifndef NDEBUG
|
|
assert(MRI->getType(Op0) == MRI->getType(Op0) && "type mismatch");
|
|
assert(CmpInst::isIntPredicate(Pred) && "invalid predicate");
|
|
if (MRI->getType(Op0).isScalar() || MRI->getType(Op0).isPointer())
|
|
assert(MRI->getType(Res).isScalar() && "type mismatch");
|
|
else
|
|
assert(MRI->getType(Res).isVector() &&
|
|
MRI->getType(Res).getNumElements() ==
|
|
MRI->getType(Op0).getNumElements() &&
|
|
"type mismatch");
|
|
#endif
|
|
|
|
return buildInstr(TargetOpcode::G_ICMP)
|
|
.addDef(Res)
|
|
.addPredicate(Pred)
|
|
.addUse(Op0)
|
|
.addUse(Op1);
|
|
}
|
|
|
|
MachineInstrBuilder MachineIRBuilder::buildFCmp(CmpInst::Predicate Pred,
|
|
unsigned Res, unsigned Op0,
|
|
unsigned Op1) {
|
|
#ifndef NDEBUG
|
|
assert((MRI->getType(Op0).isScalar() || MRI->getType(Op0).isVector()) &&
|
|
"invalid operand type");
|
|
assert(MRI->getType(Op0) == MRI->getType(Op1) && "type mismatch");
|
|
assert(CmpInst::isFPPredicate(Pred) && "invalid predicate");
|
|
if (MRI->getType(Op0).isScalar())
|
|
assert(MRI->getType(Res).isScalar() && "type mismatch");
|
|
else
|
|
assert(MRI->getType(Res).isVector() &&
|
|
MRI->getType(Res).getNumElements() ==
|
|
MRI->getType(Op0).getNumElements() &&
|
|
"type mismatch");
|
|
#endif
|
|
|
|
return buildInstr(TargetOpcode::G_FCMP)
|
|
.addDef(Res)
|
|
.addPredicate(Pred)
|
|
.addUse(Op0)
|
|
.addUse(Op1);
|
|
}
|
|
|
|
MachineInstrBuilder MachineIRBuilder::buildSelect(unsigned Res, unsigned Tst,
|
|
unsigned Op0, unsigned Op1) {
|
|
#ifndef NDEBUG
|
|
LLT ResTy = MRI->getType(Res);
|
|
assert((ResTy.isScalar() || ResTy.isVector() || ResTy.isPointer()) &&
|
|
"invalid operand type");
|
|
assert(ResTy == MRI->getType(Op0) && ResTy == MRI->getType(Op1) &&
|
|
"type mismatch");
|
|
if (ResTy.isScalar() || ResTy.isPointer())
|
|
assert(MRI->getType(Tst).isScalar() && "type mismatch");
|
|
else
|
|
assert((MRI->getType(Tst).isScalar() ||
|
|
(MRI->getType(Tst).isVector() &&
|
|
MRI->getType(Tst).getNumElements() ==
|
|
MRI->getType(Op0).getNumElements())) &&
|
|
"type mismatch");
|
|
#endif
|
|
|
|
return buildInstr(TargetOpcode::G_SELECT)
|
|
.addDef(Res)
|
|
.addUse(Tst)
|
|
.addUse(Op0)
|
|
.addUse(Op1);
|
|
}
|
|
|
|
MachineInstrBuilder MachineIRBuilder::buildInsertVectorElement(unsigned Res,
|
|
unsigned Val,
|
|
unsigned Elt,
|
|
unsigned Idx) {
|
|
#ifndef NDEBUG
|
|
LLT ResTy = MRI->getType(Res);
|
|
LLT ValTy = MRI->getType(Val);
|
|
LLT EltTy = MRI->getType(Elt);
|
|
LLT IdxTy = MRI->getType(Idx);
|
|
assert(ResTy.isVector() && ValTy.isVector() && "invalid operand type");
|
|
assert(IdxTy.isScalar() && "invalid operand type");
|
|
assert(ResTy.getNumElements() == ValTy.getNumElements() && "type mismatch");
|
|
assert(ResTy.getElementType() == EltTy && "type mismatch");
|
|
#endif
|
|
|
|
return buildInstr(TargetOpcode::G_INSERT_VECTOR_ELT)
|
|
.addDef(Res)
|
|
.addUse(Val)
|
|
.addUse(Elt)
|
|
.addUse(Idx);
|
|
}
|
|
|
|
MachineInstrBuilder MachineIRBuilder::buildExtractVectorElement(unsigned Res,
|
|
unsigned Val,
|
|
unsigned Idx) {
|
|
#ifndef NDEBUG
|
|
LLT ResTy = MRI->getType(Res);
|
|
LLT ValTy = MRI->getType(Val);
|
|
LLT IdxTy = MRI->getType(Idx);
|
|
assert(ValTy.isVector() && "invalid operand type");
|
|
assert((ResTy.isScalar() || ResTy.isPointer()) && "invalid operand type");
|
|
assert(IdxTy.isScalar() && "invalid operand type");
|
|
assert(ValTy.getElementType() == ResTy && "type mismatch");
|
|
#endif
|
|
|
|
return buildInstr(TargetOpcode::G_EXTRACT_VECTOR_ELT)
|
|
.addDef(Res)
|
|
.addUse(Val)
|
|
.addUse(Idx);
|
|
}
|
|
|
|
void MachineIRBuilder::validateTruncExt(unsigned Dst, unsigned Src,
|
|
bool IsExtend) {
|
|
#ifndef NDEBUG
|
|
LLT SrcTy = MRI->getType(Src);
|
|
LLT DstTy = MRI->getType(Dst);
|
|
|
|
if (DstTy.isVector()) {
|
|
assert(SrcTy.isVector() && "mismatched cast between vecot and non-vector");
|
|
assert(SrcTy.getNumElements() == DstTy.getNumElements() &&
|
|
"different number of elements in a trunc/ext");
|
|
} else
|
|
assert(DstTy.isScalar() && SrcTy.isScalar() && "invalid extend/trunc");
|
|
|
|
if (IsExtend)
|
|
assert(DstTy.getSizeInBits() > SrcTy.getSizeInBits() &&
|
|
"invalid narrowing extend");
|
|
else
|
|
assert(DstTy.getSizeInBits() < SrcTy.getSizeInBits() &&
|
|
"invalid widening trunc");
|
|
#endif
|
|
}
|