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fc07498e4aca8a94dea665a786d7509a60ffeb59
clang-p2996/llvm/test/Transforms/LoopVectorize/AArch64
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Matthew Simpson 12b9c5ba98 Reapply "[TTI] Refine default cost for interleaved load groups with gaps"
This reapplies commit r272385 with a fix. The build was failing when compiled
with gcc, but not with clang. With the fix, we now get the data layout from the
current TTI implementation, which will hopefully solve the issue.

llvm-svn: 272395
2016-06-10 14:33:30 +00:00
..
aarch64-unroll.ll
…
arbitrary-induction-step.ll
…
arm64-unroll.ll
…
backedge-overflow.ll
Re-commit [SCEV] Introduce a guarded backedge taken count and use it in LAA and LV
2016-04-08 14:29:09 +00:00
deterministic-type-shrinkage.ll
[LoopVectorize] Use MapVector rather than DenseMap for MinBWs.
2015-11-26 20:39:51 +00:00
first-order-recurrence.ll
[LoopUtils, LV] Fix PR27246 (first-order recurrences)
2016-04-11 19:48:18 +00:00
gather-cost.ll
…
interleaved_cost.ll
Reapply "[TTI] Refine default cost for interleaved load groups with gaps"
2016-06-10 14:33:30 +00:00
lit.local.cfg
…
loop-vectorization-factors.ll
Revert "[VectorUtils] Query number of sign bits to allow more truncations"
2016-05-10 12:27:23 +00:00
max-vf-for-interleaved.ll
[LAA] Rename forwarding conflict detection option (NFC)
2016-05-16 17:00:56 +00:00
reduction-small-size.ll
…
sdiv-pow2.ll
…
type-shrinkage-insertelt.ll
[LV] Add support for insertelt/extractelt processing during type truncation
2016-02-15 15:38:17 +00:00
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