Jay Foad 830ed64ccd Revert "Revert "[AMDGPU] Reorganize GCN subtarget features for unaligned access"" ...

This reverts commit 8b08fa0103.

The underlying problems were fixed by D90607.

2020-11-11 14:40:14 +00:00

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expected-target-index-name.mir

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intrinsics.mir

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invalid-target-index-operand.mir

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lit.local.cfg

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llc-target-cpu-attr-from-cmdline-ir.mir

Revert "Revert "[AMDGPU] Reorganize GCN subtarget features for unaligned access""

2020-11-11 14:40:14 +00:00

llc-target-cpu-attr-from-cmdline.mir

Revert "Revert "[AMDGPU] Reorganize GCN subtarget features for unaligned access""

2020-11-11 14:40:14 +00:00

load-store-opt-dlc.mir

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machine-function-info-dynlds-align-invalid-case.mir

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machine-function-info-no-ir.mir

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machine-function-info-register-parse-error1.mir

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machine-function-info-register-parse-error2.mir

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machine-function-info.ll

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mfi-frame-offset-reg-class.mir

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mfi-parse-error-frame-offset-reg.mir

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mfi-parse-error-scratch-rsrc-reg.mir

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mfi-parse-error-stack-ptr-offset-reg.mir

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mfi-scratch-rsrc-reg-reg-class.mir

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mfi-stack-ptr-offset-reg-class.mir

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mir-canon-multi.mir

[MIRVRegNamer] Experimental MachineInstr stable hashing (Fowler-Noll-Vo)

2020-09-03 16:13:09 -04:00

mircanon-memoperands.mir

[MIRVRegNamer] Experimental MachineInstr stable hashing (Fowler-Noll-Vo)

2020-09-03 16:13:09 -04:00

parse-order-reserved-regs.mir

[MIRVRegNamer] Experimental MachineInstr stable hashing (Fowler-Noll-Vo)

2020-09-03 16:13:09 -04:00

stack-id-assert.mir

[MIR] Fix out of bounds access in MIRPrinter.

2020-10-29 14:35:06 +03:00

stack-id.mir

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subreg-def-is-not-ssa.mir

MIR: Infer not-SSA for subregister defs

2020-08-27 16:56:16 -04:00

syncscopes.mir

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target-flags.mir

[AMDGPU] Fix offset for REL32_HI relocs

2020-09-02 10:55:55 +01:00

target-index-operands.mir

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