e28b6a60bc
Regenerated using: ./llvm/utils/update_llc_test_checks.py -u llvm/test/CodeGen/RISCV/*.ll This has added comments to spill-related instructions and added @plt to some symbols. Differential Revision: https://reviews.llvm.org/D92841
35 lines
1.2 KiB
LLVM
35 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck %s
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;
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; The test case check that RV64 could handle the stack adjustment offset exceed
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; 32-bit.
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define void @foo() nounwind {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addi sp, sp, -2032
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; CHECK-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
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; CHECK-NEXT: lui a0, 95
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; CHECK-NEXT: addiw a0, a0, 1505
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; CHECK-NEXT: slli a0, a0, 13
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; CHECK-NEXT: addi a0, a0, -2000
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; CHECK-NEXT: sub sp, sp, a0
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; CHECK-NEXT: addi a0, sp, 16
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; CHECK-NEXT: call baz@plt
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; CHECK-NEXT: lui a0, 95
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; CHECK-NEXT: addiw a0, a0, 1505
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; CHECK-NEXT: slli a0, a0, 13
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; CHECK-NEXT: addi a0, a0, -2000
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; CHECK-NEXT: add sp, sp, a0
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; CHECK-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 2032
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; CHECK-NEXT: ret
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entry:
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%w = alloca [100000000 x { fp128, fp128 }], align 16
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%arraydecay = getelementptr inbounds [100000000 x { fp128, fp128 }], [100000000 x { fp128, fp128 }]* %w, i64 0, i64 0
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call void @baz({ fp128, fp128 }* nonnull %arraydecay)
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ret void
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}
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declare void @baz({ fp128, fp128 }*)
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