9529597cf4
This was reverted because of a miscompilation. At closer inspection, the problem was actually visible in a changed llvm regression test too. This one-line follow up fix/recommit will splat the IV, which is what we are trying to avoid if unnecessary in general, if tail-folding is requested even if all users are scalar instructions after vectorisation. Because with tail-folding, the splat IV will be used by the predicate of the masked loads/stores instructions. The previous version omitted this, which caused the miscompilation. The original commit message was: If tail-folding of the scalar remainder loop is applied, the primary induction variable is splat to a vector and used by the masked load/store vector instructions, thus the IV does not remain scalar. Because we now mark that the IV does not remain scalar for these cases, we don't emit the vector IV if it is not used. Thus, the vectoriser produces less dead code. Thanks to Ayal Zaks for the direction how to fix this.
73 lines
3.4 KiB
LLVM
73 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -loop-vectorize -S -mtriple=x86_64-- -o - %s | FileCheck %s
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; Testcase that verify that we don't get a faulty bitcast that cast between
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; different sizes.
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%rec8 = type { i16 }
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@a = global [1 x %rec8] zeroinitializer
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@b = global [2 x i16*] zeroinitializer
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define void @f1() {
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; CHECK-LABEL: @f1(
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; CHECK-NEXT: bb1:
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; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[OFFSET_IDX:%.*]] = trunc i32 [[INDEX]] to i16
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; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[OFFSET_IDX]], i32 0
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; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i16> [[BROADCAST_SPLATINSERT]], <2 x i16> undef, <2 x i32> zeroinitializer
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; CHECK-NEXT: [[INDUCTION:%.*]] = add <2 x i16> [[BROADCAST_SPLAT]], <i16 0, i16 1>
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; CHECK-NEXT: [[TMP0:%.*]] = add i16 [[OFFSET_IDX]], 0
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; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[TMP0]] to i64
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr [2 x i16*], [2 x i16*]* @b, i16 0, i64 [[TMP1]]
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i16*, i16** [[TMP2]], i32 0
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16** [[TMP3]] to <2 x i16*>*
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; CHECK-NEXT: store <2 x i16*> <i16* getelementptr inbounds ([1 x %rec8], [1 x %rec8]* @a, i32 0, i32 0, i32 0), i16* getelementptr inbounds ([1 x %rec8], [1 x %rec8]* @a, i32 0, i32 0, i32 0)>, <2 x i16*>* [[TMP4]], align 8
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; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 2
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; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], 2
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; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop !0
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; CHECK: middle.block:
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; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 2, 2
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; CHECK-NEXT: br i1 [[CMP_N]], label [[BB3:%.*]], label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i16 [ 2, [[MIDDLE_BLOCK]] ], [ 0, [[BB1:%.*]] ]
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; CHECK-NEXT: br label [[BB2:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: [[C_1_0:%.*]] = phi i16 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[_TMP9:%.*]], [[BB2]] ]
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; CHECK-NEXT: [[_TMP1:%.*]] = zext i16 0 to i64
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; CHECK-NEXT: [[_TMP2:%.*]] = getelementptr [1 x %rec8], [1 x %rec8]* @a, i16 0, i64 [[_TMP1]]
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; CHECK-NEXT: [[_TMP4:%.*]] = bitcast %rec8* [[_TMP2]] to i16*
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; CHECK-NEXT: [[_TMP6:%.*]] = sext i16 [[C_1_0]] to i64
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; CHECK-NEXT: [[_TMP7:%.*]] = getelementptr [2 x i16*], [2 x i16*]* @b, i16 0, i64 [[_TMP6]]
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; CHECK-NEXT: store i16* [[_TMP4]], i16** [[_TMP7]]
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; CHECK-NEXT: [[_TMP9]] = add nsw i16 [[C_1_0]], 1
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; CHECK-NEXT: [[_TMP11:%.*]] = icmp slt i16 [[_TMP9]], 2
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; CHECK-NEXT: br i1 [[_TMP11]], label [[BB2]], label [[BB3]], !llvm.loop !2
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; CHECK: bb3:
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; CHECK-NEXT: ret void
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;
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bb1:
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br label %bb2
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bb2:
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%c.1.0 = phi i16 [ 0, %bb1 ], [ %_tmp9, %bb2 ]
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%_tmp1 = zext i16 0 to i64
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%_tmp2 = getelementptr [1 x %rec8], [1 x %rec8]* @a, i16 0, i64 %_tmp1
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%_tmp4 = bitcast %rec8* %_tmp2 to i16*
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%_tmp6 = sext i16 %c.1.0 to i64
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%_tmp7 = getelementptr [2 x i16*], [2 x i16*]* @b, i16 0, i64 %_tmp6
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store i16* %_tmp4, i16** %_tmp7
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%_tmp9 = add nsw i16 %c.1.0, 1
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%_tmp11 = icmp slt i16 %_tmp9, 2
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br i1 %_tmp11, label %bb2, label %bb3
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bb3:
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ret void
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}
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