7310501f74
This revision starts an Arm-specific ArmNeon dialect discussed in the [discourse RFC thread](https://llvm.discourse.group/t/rfc-vector-dialects-neon-and-sve/2284). Differential Revision: https://reviews.llvm.org/D92171
90 lines
3.4 KiB
C++
90 lines
3.4 KiB
C++
//===- ConvertAVX512ToLLVM.cpp - Convert AVX512 to the LLVM dialect -------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Conversion/AVX512ToLLVM/ConvertAVX512ToLLVM.h"
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
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#include "mlir/Dialect/AVX512/AVX512Dialect.h"
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#include "mlir/Dialect/LLVMIR/LLVMAVX512Dialect.h"
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#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
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#include "mlir/Dialect/StandardOps/IR/Ops.h"
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#include "mlir/Dialect/Vector/VectorOps.h"
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#include "mlir/IR/BuiltinOps.h"
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#include "mlir/IR/PatternMatch.h"
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using namespace mlir;
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using namespace mlir::vector;
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using namespace mlir::avx512;
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template <typename OpTy>
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static Type getSrcVectorElementType(Operation *op) {
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return cast<OpTy>(op)
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.src()
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.getType()
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.template cast<VectorType>()
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.getElementType();
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}
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namespace {
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// TODO: turn these into simpler declarative templated patterns when we've had
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// enough.
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struct MaskRndScaleOp512Conversion : public ConvertToLLVMPattern {
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explicit MaskRndScaleOp512Conversion(MLIRContext *context,
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LLVMTypeConverter &typeConverter)
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: ConvertToLLVMPattern(MaskRndScaleOp::getOperationName(), context,
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typeConverter) {}
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LogicalResult
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matchAndRewrite(Operation *op, ArrayRef<Value> operands,
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ConversionPatternRewriter &rewriter) const override {
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Type elementType = getSrcVectorElementType<MaskRndScaleOp>(op);
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if (elementType.isF32())
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return LLVM::detail::oneToOneRewrite(
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op, LLVM::x86_avx512_mask_rndscale_ps_512::getOperationName(),
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operands, *getTypeConverter(), rewriter);
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if (elementType.isF64())
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return LLVM::detail::oneToOneRewrite(
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op, LLVM::x86_avx512_mask_rndscale_pd_512::getOperationName(),
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operands, *getTypeConverter(), rewriter);
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return failure();
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}
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};
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struct ScaleFOp512Conversion : public ConvertToLLVMPattern {
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explicit ScaleFOp512Conversion(MLIRContext *context,
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LLVMTypeConverter &typeConverter)
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: ConvertToLLVMPattern(MaskScaleFOp::getOperationName(), context,
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typeConverter) {}
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LogicalResult
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matchAndRewrite(Operation *op, ArrayRef<Value> operands,
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ConversionPatternRewriter &rewriter) const override {
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Type elementType = getSrcVectorElementType<MaskScaleFOp>(op);
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if (elementType.isF32())
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return LLVM::detail::oneToOneRewrite(
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op, LLVM::x86_avx512_mask_scalef_ps_512::getOperationName(), operands,
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*getTypeConverter(), rewriter);
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if (elementType.isF64())
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return LLVM::detail::oneToOneRewrite(
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op, LLVM::x86_avx512_mask_scalef_pd_512::getOperationName(), operands,
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*getTypeConverter(), rewriter);
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return failure();
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}
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};
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} // namespace
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/// Populate the given list with patterns that convert from AVX512 to LLVM.
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void mlir::populateAVX512ToLLVMConversionPatterns(
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LLVMTypeConverter &converter, OwningRewritePatternList &patterns) {
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// clang-format off
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patterns.insert<MaskRndScaleOp512Conversion,
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ScaleFOp512Conversion>(&converter.getContext(), converter);
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// clang-format on
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}
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