2edcde00cb
Early revisions of the VR4300 have a hardware bug where two consecutive multiplications can produce an incorrect result in the second multiply. This revision adds the `-mfix4300` flag to llvm (and clang) which, when passed, provides a software fix for this issue. More precise description of the "mulmul" bug: ``` mul.[s,d] fd,fs,ft mul.[s,d] fd,fs,ft or [D]MULT[U] rs,rt ``` When the above sequence is executed by the CPU, if at least one of the source operands of the first mul instruction happens to be `sNaN`, `0` or `Infinity`, then the second mul instruction may produce an incorrect result. This can happen both if the two mul instructions are next to each other and if the first one is in a delay slot and the second is the first instruction of the branch target. Description of the fix: This fix adds a backend pass to llvm which scans for mul instructions in each basic block and inserts a nop whenever the following conditions are met: - The current instruction is a single or double-precision floating-point mul instruction. - The next instruction is either a mul instruction (any kind) or a branch instruction. Differential Revision: https://reviews.llvm.org/D116238
135 lines
3.9 KiB
C++
135 lines
3.9 KiB
C++
//===- MipsMulMulBugPass.cpp - Mips VR4300 mulmul bugfix pass -------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Early revisions of the VR4300 have a hardware bug where two consecutive
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// multiplications can produce an incorrect result in the second multiply.
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//
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// This pass scans for mul instructions in each basic block and inserts
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// a nop whenever the following conditions are met:
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//
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// - The current instruction is a single or double-precision floating-point
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// mul instruction.
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// - The next instruction is either a mul instruction (any kind)
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// or a branch instruction.
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//===----------------------------------------------------------------------===//
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#include "Mips.h"
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#include "MipsInstrInfo.h"
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#include "MipsSubtarget.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Target/TargetMachine.h"
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#define DEBUG_TYPE "mips-vr4300-mulmul-fix"
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using namespace llvm;
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namespace {
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class MipsMulMulBugFix : public MachineFunctionPass {
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public:
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MipsMulMulBugFix() : MachineFunctionPass(ID) {
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initializeMipsMulMulBugFixPass(*PassRegistry::getPassRegistry());
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}
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StringRef getPassName() const override { return "Mips VR4300 mulmul bugfix"; }
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MachineFunctionProperties getRequiredProperties() const override {
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return MachineFunctionProperties().set(
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MachineFunctionProperties::Property::NoVRegs);
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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static char ID;
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private:
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bool fixMulMulBB(MachineBasicBlock &MBB, const MipsInstrInfo &MipsII);
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};
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} // namespace
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INITIALIZE_PASS(MipsMulMulBugFix, "mips-vr4300-mulmul-fix",
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"Mips VR4300 mulmul bugfix", false, false)
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char MipsMulMulBugFix::ID = 0;
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bool MipsMulMulBugFix::runOnMachineFunction(MachineFunction &MF) {
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const MipsInstrInfo &MipsII =
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*static_cast<const MipsInstrInfo *>(MF.getSubtarget().getInstrInfo());
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bool Modified = false;
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for (auto &MBB : MF)
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Modified |= fixMulMulBB(MBB, MipsII);
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return Modified;
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}
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static bool isFirstMul(const MachineInstr &MI) {
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switch (MI.getOpcode()) {
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case Mips::FMUL_S:
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case Mips::FMUL_D:
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case Mips::FMUL_D32:
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case Mips::FMUL_D64:
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return true;
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default:
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return false;
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}
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}
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static bool isSecondMulOrBranch(const MachineInstr &MI) {
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if (MI.isBranch() || MI.isIndirectBranch() || MI.isCall())
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return true;
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switch (MI.getOpcode()) {
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case Mips::MUL:
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case Mips::FMUL_S:
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case Mips::FMUL_D:
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case Mips::FMUL_D32:
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case Mips::FMUL_D64:
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case Mips::MULT:
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case Mips::MULTu:
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case Mips::DMULT:
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case Mips::DMULTu:
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return true;
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default:
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return false;
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}
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}
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bool MipsMulMulBugFix::fixMulMulBB(MachineBasicBlock &MBB,
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const MipsInstrInfo &MipsII) {
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bool Modified = false;
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// Iterate through the instructions in the basic block
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for (MachineBasicBlock::instr_iterator MII = MBB.instr_begin(),
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E = MBB.instr_end();
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MII != E; ++MII) {
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MachineBasicBlock::instr_iterator NextMII = std::next(MII);
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// Trigger when the current instruction is a mul and the next instruction
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// is either a mul or a branch in case the branch target start with a mul
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if (NextMII != E && isFirstMul(*MII) && isSecondMulOrBranch(*NextMII)) {
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LLVM_DEBUG(dbgs() << "Found mulmul!");
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const MCInstrDesc &NewMCID = MipsII.get(Mips::NOP);
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BuildMI(MBB, NextMII, DebugLoc(), NewMCID);
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Modified = true;
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}
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}
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return Modified;
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}
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FunctionPass *llvm::createMipsMulMulBugPass() { return new MipsMulMulBugFix(); }
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