729bf9b26b
Code using indirect calls is broken without this, and there isn't really much value in supporting the old attempt to vary the argument placement based on uses. This resulted in more argument shuffling code anyway. Also have the option stop implying all inputs need to be passed. This will no rely on the amdgpu-no-* attributes to avoid passing unnecessary values.
158 lines
5.9 KiB
LLVM
158 lines
5.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
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; Load argument depends on waitcnt which should be skipped.
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define amdgpu_kernel void @call_memory_arg_load(i32 addrspace(3)* %ptr, i32) #0 {
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; GCN-LABEL: call_memory_arg_load:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_load_dword s6, s[6:7], 0x0
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; GCN-NEXT: s_add_u32 flat_scratch_lo, s8, s11
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; GCN-NEXT: s_addc_u32 flat_scratch_hi, s9, 0
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; GCN-NEXT: s_add_u32 s0, s0, s11
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; GCN-NEXT: s_addc_u32 s1, s1, 0
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: v_mov_b32_e32 v0, s6
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; GCN-NEXT: ds_read_b32 v0, v0
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; GCN-NEXT: s_mov_b64 s[6:7], s[4:5]
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; GCN-NEXT: s_mov_b32 s32, 0
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; GCN-NEXT: s_getpc_b64 s[8:9]
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; GCN-NEXT: s_add_u32 s8, s8, func@rel32@lo+4
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; GCN-NEXT: s_addc_u32 s9, s9, func@rel32@hi+12
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; GCN-NEXT: s_swappc_b64 s[30:31], s[8:9]
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; GCN-NEXT: s_endpgm
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%vgpr = load volatile i32, i32 addrspace(3)* %ptr
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call void @func(i32 %vgpr)
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ret void
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}
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; Memory waitcnt with no register dependence on the call
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define amdgpu_kernel void @call_memory_no_dep(i32 addrspace(1)* %ptr, i32) #0 {
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; GCN-LABEL: call_memory_no_dep:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_load_dwordx2 s[6:7], s[6:7], 0x0
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; GCN-NEXT: s_add_u32 flat_scratch_lo, s8, s11
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; GCN-NEXT: s_addc_u32 flat_scratch_hi, s9, 0
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; GCN-NEXT: s_add_u32 s0, s0, s11
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; GCN-NEXT: v_mov_b32_e32 v0, 0
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; GCN-NEXT: s_addc_u32 s1, s1, 0
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: global_store_dword v0, v0, s[6:7]
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; GCN-NEXT: s_mov_b64 s[6:7], s[4:5]
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; GCN-NEXT: v_mov_b32_e32 v0, 0
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; GCN-NEXT: s_mov_b32 s32, 0
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; GCN-NEXT: s_getpc_b64 s[8:9]
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; GCN-NEXT: s_add_u32 s8, s8, func@rel32@lo+4
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; GCN-NEXT: s_addc_u32 s9, s9, func@rel32@hi+12
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; GCN-NEXT: s_swappc_b64 s[30:31], s[8:9]
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; GCN-NEXT: s_endpgm
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store i32 0, i32 addrspace(1)* %ptr
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call void @func(i32 0)
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ret void
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}
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; Should not wait after the call before memory
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define amdgpu_kernel void @call_no_wait_after_call(i32 addrspace(1)* %ptr, i32) #0 {
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; GCN-LABEL: call_no_wait_after_call:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_add_u32 flat_scratch_lo, s8, s11
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; GCN-NEXT: s_load_dwordx2 s[34:35], s[6:7], 0x0
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; GCN-NEXT: s_addc_u32 flat_scratch_hi, s9, 0
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; GCN-NEXT: s_add_u32 s0, s0, s11
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; GCN-NEXT: s_addc_u32 s1, s1, 0
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; GCN-NEXT: s_mov_b64 s[6:7], s[4:5]
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; GCN-NEXT: v_mov_b32_e32 v0, 0
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; GCN-NEXT: s_mov_b32 s32, 0
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; GCN-NEXT: s_getpc_b64 s[8:9]
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; GCN-NEXT: s_add_u32 s8, s8, func@rel32@lo+4
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; GCN-NEXT: s_addc_u32 s9, s9, func@rel32@hi+12
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; GCN-NEXT: v_mov_b32_e32 v40, 0
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; GCN-NEXT: s_swappc_b64 s[30:31], s[8:9]
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; GCN-NEXT: global_store_dword v40, v40, s[34:35]
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; GCN-NEXT: s_endpgm
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call void @func(i32 0)
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store i32 0, i32 addrspace(1)* %ptr
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ret void
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}
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define amdgpu_kernel void @call_no_wait_after_call_return_val(i32 addrspace(1)* %ptr, i32) #0 {
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; GCN-LABEL: call_no_wait_after_call_return_val:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_add_u32 flat_scratch_lo, s8, s11
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; GCN-NEXT: s_load_dwordx2 s[34:35], s[6:7], 0x0
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; GCN-NEXT: s_addc_u32 flat_scratch_hi, s9, 0
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; GCN-NEXT: s_add_u32 s0, s0, s11
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; GCN-NEXT: s_addc_u32 s1, s1, 0
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; GCN-NEXT: s_mov_b64 s[6:7], s[4:5]
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; GCN-NEXT: v_mov_b32_e32 v0, 0
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; GCN-NEXT: s_mov_b32 s32, 0
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; GCN-NEXT: s_getpc_b64 s[8:9]
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; GCN-NEXT: s_add_u32 s8, s8, func.return@rel32@lo+4
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; GCN-NEXT: s_addc_u32 s9, s9, func.return@rel32@hi+12
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; GCN-NEXT: v_mov_b32_e32 v40, 0
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; GCN-NEXT: s_swappc_b64 s[30:31], s[8:9]
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; GCN-NEXT: global_store_dword v40, v0, s[34:35]
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; GCN-NEXT: s_endpgm
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%rv = call i32 @func.return(i32 0)
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store i32 %rv, i32 addrspace(1)* %ptr
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ret void
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}
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; Need to wait for the address dependency
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define amdgpu_kernel void @call_got_load(i32 addrspace(1)* %ptr, i32) #0 {
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; GCN-LABEL: call_got_load:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_add_u32 flat_scratch_lo, s8, s11
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; GCN-NEXT: s_addc_u32 flat_scratch_hi, s9, 0
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; GCN-NEXT: s_add_u32 s0, s0, s11
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; GCN-NEXT: s_addc_u32 s1, s1, 0
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; GCN-NEXT: s_getpc_b64 s[6:7]
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; GCN-NEXT: s_add_u32 s6, s6, got.func@gotpcrel32@lo+4
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; GCN-NEXT: s_addc_u32 s7, s7, got.func@gotpcrel32@hi+12
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; GCN-NEXT: s_load_dwordx2 s[8:9], s[6:7], 0x0
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; GCN-NEXT: s_mov_b64 s[6:7], s[4:5]
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; GCN-NEXT: v_mov_b32_e32 v0, 0
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; GCN-NEXT: s_mov_b32 s32, 0
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: s_swappc_b64 s[30:31], s[8:9]
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; GCN-NEXT: s_endpgm
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call void @got.func(i32 0)
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ret void
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}
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; Need to wait for the address dependency
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define void @tailcall_got_load(i32 addrspace(1)* %ptr, i32) #0 {
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; GCN-LABEL: tailcall_got_load:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: s_getpc_b64 s[4:5]
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; GCN-NEXT: s_add_u32 s4, s4, got.func@gotpcrel32@lo+4
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; GCN-NEXT: s_addc_u32 s5, s5, got.func@gotpcrel32@hi+12
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; GCN-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
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; GCN-NEXT: v_mov_b32_e32 v0, 0
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: s_setpc_b64 s[4:5]
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tail call void @got.func(i32 0)
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ret void
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}
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; No need to wait for the load.
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define void @tail_call_memory_arg_load(i32 addrspace(3)* %ptr, i32) #0 {
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; GCN-LABEL: tail_call_memory_arg_load:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: ds_read_b32 v0, v0
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; GCN-NEXT: s_getpc_b64 s[4:5]
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; GCN-NEXT: s_add_u32 s4, s4, func@rel32@lo+4
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; GCN-NEXT: s_addc_u32 s5, s5, func@rel32@hi+12
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; GCN-NEXT: s_setpc_b64 s[4:5]
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%vgpr = load volatile i32, i32 addrspace(3)* %ptr
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tail call void @func(i32 %vgpr)
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ret void
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}
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declare hidden void @func(i32) #0
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declare hidden i32 @func.return(i32) #0
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declare void @got.func(i32) #0
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attributes #0 = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }
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