da067ed569
Using a BufferSize of one for memory ProcResources will result in better ILP since it more accurately models the dependencies between memory ops and their consumers on an in-order processor. After this change, the scheduler will treat the data edges from loads as blocking so that stalls are guaranteed when waiting for data to be retreaved from memory. Since we don't actually track waitcnt here, this should do a better job at modeling their behavior. Practically, this means that the scheduler will trigger the 'STALL' heuristic more often. This type of change needs to be evaluated experimentally. Preliminary results are positive. Fixes: SWDEV-282962 Reviewed By: rampitec Differential Revision: https://reviews.llvm.org/D114777
64 lines
3.8 KiB
YAML
64 lines
3.8 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=machine-scheduler -verify-misched -o - %s | FileCheck %s
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--- |
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define amdgpu_kernel void @schedule_ilp(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in) { ret void }
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!0 = distinct !{!0}
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!1 = !{!1, !0}
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...
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# Check that the load that defines %4 and its user are scheduled as far apart
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# as possible. In this example, the generic machine scheduler's default latency
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# heuristic will not be triggered early enough. Verify that our backend handles
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# this properly.
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---
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name: schedule_ilp
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tracksRegLiveness: true
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machineFunctionInfo:
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stackPtrOffsetReg: $sgpr32
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stack:
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- { id: 0, type: default, offset: 0, size: 4, alignment: 4 }
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- { id: 1, type: default, offset: 0, size: 4, alignment: 4 }
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1_sgpr2_sgpr3
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; CHECK-LABEL: name: schedule_ilp
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; CHECK: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
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; CHECK-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; CHECK-NEXT: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
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; CHECK-NEXT: $exec = S_OR_B64 $exec, [[DEF]], implicit-def $scc
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; CHECK-NEXT: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[DEF3]], 0, 0, implicit $exec :: (load (s32) from %ir.in, !alias.scope !0, addrspace 1)
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; CHECK-NEXT: [[GLOBAL_LOAD_DWORD1:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[DEF3]], 4, 0, implicit $exec :: (load (s32) from %ir.in, !alias.scope !0, addrspace 1)
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; CHECK-NEXT: [[GLOBAL_LOAD_DWORD2:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[DEF3]], 8, 0, implicit $exec :: (load (s32) from %ir.in, !alias.scope !0, addrspace 1)
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; CHECK-NEXT: BUFFER_STORE_DWORD_OFFEN [[DEF1]], %stack.0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store (s32) into %ir.out, !noalias !0, addrspace 1)
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; CHECK-NEXT: BUFFER_STORE_DWORD_OFFEN [[DEF2]], %stack.0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 4, 0, 0, 0, implicit $exec :: (store (s32) into %ir.out, !noalias !0, addrspace 1)
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; CHECK-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO 0, implicit $exec
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; CHECK-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 -1, [[GLOBAL_LOAD_DWORD]], implicit $exec
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; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
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; CHECK-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]]
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; CHECK-NEXT: S_ENDPGM 0, implicit [[GLOBAL_LOAD_DWORD1]], implicit [[GLOBAL_LOAD_DWORD2]], implicit [[V_MOV_B]]
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%0:sreg_64 = IMPLICIT_DEF
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%1:vgpr_32 = IMPLICIT_DEF
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%2:vgpr_32 = IMPLICIT_DEF
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%3:vreg_64 = IMPLICIT_DEF
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$exec = S_OR_B64 $exec, %0, implicit-def $scc
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BUFFER_STORE_DWORD_OFFEN %1:vgpr_32, %stack.0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store (s32) into %ir.out, !noalias !0)
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BUFFER_STORE_DWORD_OFFEN %2:vgpr_32, %stack.0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 4, 0, 0, 0, implicit $exec :: (store (s32) into %ir.out, !noalias !0)
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%4:vgpr_32 = GLOBAL_LOAD_DWORD %3, 0, 0, implicit $exec :: (load (s32) from %ir.in, !alias.scope !0)
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%5:vgpr_32 = GLOBAL_LOAD_DWORD %3, 4, 0, implicit $exec :: (load (s32) from %ir.in, !alias.scope !0)
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%6:vgpr_32 = GLOBAL_LOAD_DWORD %3, 8, 0, implicit $exec :: (load (s32) from %ir.in, !alias.scope !0)
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%7:sreg_64 = V_CMP_NE_U32_e64 -1, %4, implicit $exec
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%8:vreg_64 = V_MOV_B64_PSEUDO 0, implicit $exec
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%9:sreg_64 = COPY $exec, implicit-def $exec
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%10:sreg_64 = S_AND_B64 %9:sreg_64, %7:sreg_64, implicit-def dead $scc
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$exec = S_MOV_B64_term %10
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S_ENDPGM 0, implicit %5, implicit %6, implicit %8
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...
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