d391e4fe84
Be more consistent in the naming convention for the various RET instructions to specify in terms of bitwidth. Helps prevent future scheduler model mismatches like those that were only addressed in D44687. Differential Revision: https://reviews.llvm.org/D113302
31 lines
656 B
YAML
31 lines
656 B
YAML
# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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--- |
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@addr = global i8* null
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define void @test() {
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entry:
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store volatile i8* blockaddress(@test, %block), i8** @addr
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%val = load volatile i8*, i8** @addr
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indirectbr i8* %val, [label %block]
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block:
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ret void
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}
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...
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---
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name: test
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body: |
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bb.0.entry:
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successors: %bb.1.block
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; CHECK: [[@LINE+1]]:44: expected an IR function reference
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$rax = LEA64r $rip, 1, _, blockaddress(@addr, %ir-block.block), _
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MOV64mr $rip, 1, _, @addr, _, killed $rax
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JMP64m $rip, 1, _, @addr, _
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bb.1.block (address-taken):
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RET64
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...
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