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David Green 2ec3ca7477 [ARM] Extend IsCMPZCSINC to handle CMOV 
A 'CMOV 1, 0, CC, %cpsr, Cmp' is the same as a 'CSINC 0, 0, CC, Cmp',
and can be treated the same in IsCMPZCSINC added in D114013. This allows
us to remove the unnecessary CMOV in the same way that we could remove a
CSINC.

Differential Revision: https://reviews.llvm.org/D115188
2021-12-27 14:15:03 +00:00
..
LowOverheadLoops
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-intrinsics
[ARM] Use v2i1 for MVE and CDE intrinsics
2021-12-03 15:27:58 +00:00
2009-07-17-CrossRegClassCopy.ll
…
2009-07-21-ISelBug.ll
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2009-07-23-CPIslandBug.ll
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2009-07-30-PEICrash.ll
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2009-08-01-WrongLDRBOpc.ll
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2009-08-02-CoalescerBug.ll
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2009-08-04-CoalescerAssert.ll
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2009-08-04-CoalescerBug.ll
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2009-08-04-ScavengerAssert.ll
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2009-08-04-SubregLoweringBug2.ll
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2009-08-04-SubregLoweringBug3.ll
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2009-08-04-SubregLoweringBug.ll
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2009-08-06-SpDecBug.ll
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2009-08-07-CoalescerBug.ll
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2009-08-07-NeonFPBug.ll
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2009-08-08-ScavengerAssert.ll
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2009-08-10-ISelBug.ll
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2009-08-21-PostRAKill4.ll
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2009-09-01-PostRAProlog.ll
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2009-10-15-ITBlockBranch.ll
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2009-11-01-CopyReg2RegBug.ll
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2009-11-11-ScavengerAssert.ll
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2009-11-13-STRDBug.ll
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2009-12-01-LoopIVUsers.ll
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2010-01-06-TailDuplicateLabels.ll
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2010-01-19-RemovePredicates.ll
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2010-02-11-phi-cycle.ll
[CPG][ARM] Optimize towards branch on zero in codegenprepare
2021-05-16 17:54:06 +01:00
2010-02-24-BigStack.ll
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2010-03-08-addi12-ccout.ll
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2010-03-15-AsmCCClobber.ll
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2010-04-15-DynAllocBug.ll
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2010-04-26-CopyRegCrash.ll
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2010-05-24-rsbs.ll
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2010-06-14-NEONCoalescer.ll
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2010-06-19-ITBlockCrash.ll
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2010-06-21-TailMergeBug.ll
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2010-08-10-VarSizedAllocaBug.ll
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2010-11-22-EpilogueBug.ll
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2010-12-03-AddSPNarrowing.ll
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2011-04-21-FILoweringBug.ll
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2011-06-07-TwoAddrEarlyClobber.ll
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2011-12-16-T2SizeReduceAssert.ll
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2012-01-13-CBNZBug.ll
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2013-02-19-tail-call-register-hint.ll
…
2013-03-02-vduplane-nonconstant-source-index.ll
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2013-03-06-vector-sext-operand-scalarize.ll
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aapcs.ll
…
abs.ll
[ARM] Add new abs test. NFC
2021-10-21 13:03:18 +01:00
active_lane_mask.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
aligned-constants.ll
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aligned-nonfallthrough.ll
[ARM] Improve detection of fallthough when aligning blocks
2021-09-27 11:21:21 +01:00
aligned-spill.ll
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bfi.ll
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bfx.ll
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bicbfi.ll
…
bti-const-island-multiple-jump-tables.mir
[ARM] Implement BTI placement pass for PACBTI-M
2021-12-01 12:54:05 +00:00
bti-const-island.mir
[ARM] Implement BTI placement pass for PACBTI-M
2021-12-01 12:54:05 +00:00
bti-entry-blocks.ll
[ARM] Implement BTI placement pass for PACBTI-M
2021-12-01 12:54:05 +00:00
bti-indirect-branches.ll
[ARM] Implement BTI placement pass for PACBTI-M
2021-12-01 12:54:05 +00:00
bti-jump-table.mir
[ARM] Implement BTI placement pass for PACBTI-M
2021-12-01 12:54:05 +00:00
bti-outliner-1.ll
[ARM] Implement BTI placement pass for PACBTI-M
2021-12-01 12:54:05 +00:00
bti-outliner-2.ll
[ARM] Implement BTI placement pass for PACBTI-M
2021-12-01 12:54:05 +00:00
bti-outliner-cost-1.ll
[ARM] Implement BTI placement pass for PACBTI-M
2021-12-01 12:54:05 +00:00
bti-outliner-cost-2.ll
[ARM] Implement BTI placement pass for PACBTI-M
2021-12-01 12:54:05 +00:00
bti-pac-replace-1.mir
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
bti-pac-replace-2.ll
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
bug-subw.ll
…
buildvector-crash.ll
…
call-site-info-update.ll
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carry.ll
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cbnz.ll
…
cde-gpr.ll
…
cde-vec.ll
[ARM] Use v2i1 for MVE and CDE intrinsics
2021-12-03 15:27:58 +00:00
cde-vfp.ll
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cmp-frame.ll
…
constant-hoisting.ll
…
constant-islands-cbz.ll
…
constant-islands-cbz.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
constant-islands-cbzundef.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
constant-islands-jump-table.ll
…
constant-islands-ldrsb.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
constant-islands-new-island-padding.ll
…
constant-islands-new-island.ll
…
constant-islands.ll
…
cortex-fp.ll
…
crash.ll
…
cross-rc-coalescing-1.ll
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cross-rc-coalescing-2.ll
…
csel.ll
[ARM] Ensure CSINC has one use in CSINV combine
2021-04-29 10:59:14 +01:00
div.ll
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emit-unwinding.ll
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fir.ll
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float-cmp.ll
…
float-intrinsics-double.ll
Update @llvm.powi to handle different int sizes for the exponent
2021-06-17 09:38:28 +02:00
float-intrinsics-float.ll
Update @llvm.powi to handle different int sizes for the exponent
2021-06-17 09:38:28 +02:00
float-ops.ll
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fp16-stacksplot.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
frame-index-addrmode-t2i8s4.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
frame-pointer.ll
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frameless2.ll
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frameless.ll
…
high-reg-spill.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
ifcvt-cbz.mir
…
ifcvt-compare.ll
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ifcvt-dead-predicate.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
ifcvt-minsize.ll
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ifcvt-neon-deprecated.mir
…
ifcvt-no-branch-predictor.ll
…
ifcvt-rescan-bug-2016-08-22.ll
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ifcvt-rescan-diamonds.ll
[Local] Do not introduce a new llvm.trap before unreachable
2021-07-26 23:33:36 -05:00
inflate-regs.ll
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inline-asm-i-constraint-i1.ll
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inlineasm-error-t-toofewregs-mve.ll
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inlineasm-mve.ll
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inlineasm.ll
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intrinsics-cc.ll
Update @llvm.powi to handle different int sizes for the exponent
2021-06-17 09:38:28 +02:00
intrinsics-coprocessor.ll
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large-call.ll
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large-stack.ll
…
ldr-str-imm12.ll
Revert "Allow rematerialization of virtual reg uses"
2021-09-24 10:26:11 -07:00
lit.local.cfg
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longMACt.ll
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lsll0.ll
[ARM] Ensure instructions are simplified prior to GatherScatter lowering.
2021-06-10 20:18:12 +01:00
lsr-deficiency.ll
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m4-sched-ldr.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
m4-sched-regs.ll
…
machine-licm.ll
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mul_const.ll
…
mve-abs.ll
[ARM] Create VMOVRRD from adjacent vector extracts
2021-04-20 15:15:43 +01:00
mve-basic.ll
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mve-be.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-bitarith.ll
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mve-bitcasts.ll
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mve-bitreverse.ll
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mve-blockplacement.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-bswap.ll
…
mve-ctlz.ll
[ARM] Fold away unnecessary CSET/CMPZ
2021-11-27 19:07:16 +00:00
mve-ctpop.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-cttz.ll
[ARM] Fold away unnecessary CSET/CMPZ
2021-11-27 19:07:16 +00:00
mve-div-expand.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-extractelt.ll
…
mve-extractstore.ll
…
mve-float16regloops.ll
[ARM] Move VPTBlock pass after post-ra scheduling
2021-11-04 18:42:12 +00:00
mve-float32regloops.ll
Revert "Allow rematerialization of virtual reg uses"
2021-09-24 10:26:11 -07:00
mve-fma-loops.ll
[ARM] Clean up some tests, removing dead instructions. NFC
2021-05-22 13:38:00 +01:00
mve-fmas.ll
[ARM] CSINC/CSINV patterns from CMOV
2021-11-27 20:21:41 +00:00
mve-fmath.ll
[ARM] Fold away unnecessary CSET/CMPZ
2021-11-27 19:07:16 +00:00
mve-fp16convertloops.ll
[ARM] Generate VDUP(Const) from constant buildvectors
2021-06-08 20:51:33 +01:00
mve-fp-negabs.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-fpclamptosat_vec.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-fptosi-sat-vector.ll
[ARM] Make MVE v2i1 predicates legal
2021-12-03 14:05:41 +00:00
mve-fptoui-sat-vector.ll
[ARM] Make MVE v2i1 predicates legal
2021-12-03 14:05:41 +00:00
mve-frint.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-gather-increment.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-gather-ind8-unscaled.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-gather-ind16-scaled.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-gather-ind16-unscaled.ll
[ARM] Create VMOVRRD from adjacent vector extracts
2021-04-20 15:15:43 +01:00
mve-gather-ind32-scaled.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-gather-ind32-unscaled.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-gather-optimisation-deep.ll
[ARM] Fix GatherScatter AddLikeOr condition
2021-11-15 09:44:41 +00:00
mve-gather-ptrs.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-gather-scatter-opt.ll
[ARM] Add some opaque pointer gather/scatter tests. NFC
2021-07-07 22:03:53 +01:00
mve-gather-scatter-optimisation.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-gather-scatter-ptr-address.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-gather-scatter-tailpred.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-gather-tailpred.ll
…
mve-gather-unused.ll
[ARM] Ensure instructions are simplified prior to GatherScatter lowering.
2021-06-10 20:18:12 +01:00
mve-gatherscatter-mmo.ll
[ARM] Use v2i1 for MVE and CDE intrinsics
2021-12-03 15:27:58 +00:00
mve-halving.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-laneinterleaving-cost.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-laneinterleaving.ll
[ARM] Peek through And 1 in IsCMPZCSINC
2021-12-08 15:40:23 +00:00
mve-ldst-offset.ll
…
mve-ldst-postinc.ll
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mve-ldst-preinc.ll
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mve-ldst-regimm.ll
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mve-loadstore.ll
…
mve-masked-ldst-offset.ll
[ARM] Move VPTBlock pass after post-ra scheduling
2021-11-04 18:42:12 +00:00
mve-masked-ldst-postinc.ll
[ARM] Move VPTBlock pass after post-ra scheduling
2021-11-04 18:42:12 +00:00
mve-masked-ldst-preinc.ll
[ARM] Move VPTBlock pass after post-ra scheduling
2021-11-04 18:42:12 +00:00
mve-masked-ldst.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-masked-load.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-masked-store-mmo.ll
[SDAG] Use UnknownSize for masked load/store MMO size
2021-11-23 09:47:56 +00:00
mve-masked-store.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-memtp-branch.ll
[ARM] Revert WLSTP to DLSTP if the target block is out of range
2021-08-02 10:59:52 +01:00
mve-memtp-loop.ll
[ARM] Revert WLSTP to DLSTP if the target block is out of range
2021-08-02 10:59:52 +01:00
mve-minmax.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-minmaxi.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-multivec-spill.ll
[LiveIntervals] Repair subreg ranges in processTiedPairs
2021-09-28 08:10:16 +01:00
mve-neg.ll
[ARM] Create VMOVRRD from adjacent vector extracts
2021-04-20 15:15:43 +01:00
mve-nofloat.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-nounrolledremainder.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-phireg.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-postinc-dct.ll
[ARM] Move VPTBlock pass after post-ra scheduling
2021-11-04 18:42:12 +00:00
mve-postinc-distribute.ll
[ARM] Improve WLS lowering
2021-03-11 17:56:19 +00:00
mve-postinc-distribute.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-postinc-lsr.ll
[SimplifyCFG] performBranchToCommonDestFolding(): require block-closed SSA form for bonus instructions (PR51125)
2021-09-09 12:28:09 +03:00
mve-pred-and.ll
[ARM] Peek through And 1 in IsCMPZCSINC
2021-12-08 15:40:23 +00:00
mve-pred-bitcast.ll
[ARM] Peek through And 1 in IsCMPZCSINC
2021-12-08 15:40:23 +00:00
mve-pred-build-const.ll
[ARM] Make MVE v2i1 predicates legal
2021-12-03 14:05:41 +00:00
mve-pred-build-var.ll
[ARM] Make MVE v2i1 predicates legal
2021-12-03 14:05:41 +00:00
mve-pred-const.ll
[ARM] Make MVE v2i1 predicates legal
2021-12-03 14:05:41 +00:00
mve-pred-constfold.ll
[ARM] Move VPTBlock pass after post-ra scheduling
2021-11-04 18:42:12 +00:00
mve-pred-convert.ll
…
mve-pred-ext.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-pred-loadstore.ll
[ARM] Peek through And 1 in IsCMPZCSINC
2021-12-08 15:40:23 +00:00
mve-pred-not.ll
[ARM] Peek through And 1 in IsCMPZCSINC
2021-12-08 15:40:23 +00:00
mve-pred-or.ll
[ARM] Fold away CMP/CSINC from CMOV
2021-12-19 21:53:50 +00:00
mve-pred-selectop2.ll
[ARM] Add fma and update fadd/fmul predicated select tests. NFC
2021-11-24 09:51:33 +00:00
mve-pred-selectop3.ll
[ARM] Fold (fadd x, (vselect c, y, -1.0)) into (vselect c, (fadd x, y), x)
2021-11-24 10:41:00 +00:00
mve-pred-selectop.ll
…
mve-pred-shuffle.ll
[ARM] Peek through And 1 in IsCMPZCSINC
2021-12-08 15:40:23 +00:00
mve-pred-spill.ll
[ARM] Peek through And 1 in IsCMPZCSINC
2021-12-08 15:40:23 +00:00
mve-pred-threshold.ll
…
mve-pred-vctpvpsel.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-pred-vselect.ll
[ARM] Fold away CMP/CSINC from CMOV
2021-12-19 21:53:50 +00:00
mve-pred-xor.ll
[ARM] Fold away CMP/CSINC from CMOV
2021-12-19 21:53:50 +00:00
mve-qrintr.ll
[ARM] Add more MVE intrinsics to sink splats to
2021-09-30 14:41:23 +01:00
mve-qrintrsplat.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-satmul-loops.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-saturating-arith.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-scatter-increment.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-scatter-ind8-unscaled.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-scatter-ind16-scaled.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-scatter-ind16-unscaled.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-scatter-ind32-scaled.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-scatter-ind32-unscaled.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-scatter-ptrs.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-selectcc.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-sext-masked-load.ll
[LiveIntervals] Remove unused subreg ranges in repairIntervalsInRange
2021-09-30 09:15:10 +01:00
mve-sext.ll
[ARM] Introduce MVEEXT ISel lowering
2021-07-13 07:21:20 +01:00
mve-shifts-scalar.ll
…
mve-shifts.ll
[ARM] Generate VDUP(Const) from constant buildvectors
2021-06-08 20:51:33 +01:00
mve-shuffle.ll
[ARM] MVE reverse shuffles.
2021-09-20 13:48:01 +01:00
mve-shuffleext.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-shufflemov.ll
[ARM] MVE reverse shuffles.
2021-09-20 13:48:01 +01:00
mve-simple-arith.ll
RegAllocGreedy: Account for reserved registers in num regs heuristic
2021-09-14 21:00:29 -04:00
mve-soft-float-abi.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-stack.ll
…
mve-stacksplot.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-tailpred-loopinvariant.ll
[ARM] Move VPTBlock pass after post-ra scheduling
2021-11-04 18:42:12 +00:00
mve-tp-loop.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vabd.ll
[ARM] Create VMOVRRD from adjacent vector extracts
2021-04-20 15:15:43 +01:00
mve-vabdus.ll
[ARM] Make MVE v2i1 predicates legal
2021-12-03 14:05:41 +00:00
mve-vaddqr.ll
…
mve-vaddv.ll
[ARM] Attempt to distribute reductions
2021-07-30 14:48:31 +01:00
mve-vcmp.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-vcmpf.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-vcmpfr.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-vcmpfz.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-vcmpr.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-vcmpz.ll
[ARM] Peek through And 1 in IsCMPZCSINC
2021-12-08 15:40:23 +00:00
mve-vcreate.ll
…
mve-vctp.ll
[ARM] Use v2i1 for MVE and CDE intrinsics
2021-12-03 15:27:58 +00:00
mve-vcvt16.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vcvt-fixed-to-float.ll
[ARM] Transform a floating-point to fixed-point conversion to a VCVT_fix
2021-07-01 15:10:40 +01:00
mve-vcvt-float-to-fixed.ll
[ARM] Convert fptoi.sat to fixed point multiply
2021-11-25 15:43:45 +00:00
mve-vcvt.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vdup.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vecreduce-add.ll
[ARM] Extend more reductions during lowering
2021-07-19 08:58:03 +01:00
mve-vecreduce-addpred.ll
[ARM] Peek through And 1 in IsCMPZCSINC
2021-12-08 15:40:23 +00:00
mve-vecreduce-bit.ll
[ARM] Create VMOVRRD from adjacent vector extracts
2021-04-20 15:15:43 +01:00
mve-vecreduce-fadd.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vecreduce-fminmax.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vecreduce-fmul.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vecreduce-loops.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vecreduce-mla.ll
[ARM] Switch order of creating VADDV and VMLAV.
2021-07-31 16:28:52 +01:00
mve-vecreduce-mlapred.ll
[ARM] Peek through And 1 in IsCMPZCSINC
2021-12-08 15:40:23 +00:00
mve-vecreduce-mul.ll
[ARM] Create VMOVRRD from adjacent vector extracts
2021-04-20 15:15:43 +01:00
mve-vecreduce-slp.ll
[ARM] Fix DAG combine loop in reduction distribution
2021-08-12 16:37:39 +01:00
mve-vector-spill.ll
…
mve-vfma.ll
…
mve-vhadd.ll
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
mve-vhaddsub.ll
…
mve-vidup.ll
[ARM] Recognize VIDUP from BUILDVECTORs of additions
2021-04-27 19:33:24 +01:00
mve-vld2-post.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vld2.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vld3.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vld4-post.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vld4.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vldshuffle.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vldst4.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vmaxnma-commute.ll
[ARM] Improve WLS lowering
2021-03-11 17:56:19 +00:00
mve-vmaxnma-tailpred.ll
[ARM] Move VPTBlock pass after post-ra scheduling
2021-11-04 18:42:12 +00:00
mve-vmaxv-vminv-scalar.ll
[ARM] CSINC/CSINV patterns from CMOV
2021-11-27 20:21:41 +00:00
mve-vmaxv.ll
…
mve-vmla.ll
…
mve-vmovimm.ll
[ARM] Make MVE v2i1 predicates legal
2021-12-03 14:05:41 +00:00
mve-vmovlloop.ll
[ARM] Move VPTBlock pass after post-ra scheduling
2021-11-04 18:42:12 +00:00
mve-vmovn.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vmovnstore.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vmulh.ll
[ARM] Add patterns for vmulh
2021-05-26 09:22:12 +01:00
mve-vmull-loop.ll
[ARM] Create VMOVRRD from adjacent vector extracts
2021-04-20 15:15:43 +01:00
mve-vmull-splat.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vmull.ll
…
mve-vmulqr.ll
…
mve-vmvnimm.ll
[ARM] Generate VDUP(Const) from constant buildvectors
2021-06-08 20:51:33 +01:00
mve-vpsel.ll
[ARM] Make MVE v2i1 predicates legal
2021-12-03 14:05:41 +00:00
mve-vpt-2-blocks-1-pred.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-2-blocks-2-preds.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-2-blocks-ctrl-flow.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-2-blocks-non-consecutive-ins.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-2-blocks.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-3-blocks-kill-vpr.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-block-1-ins.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-block-2-ins.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-block-4-ins.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-block-debug.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-block-elses.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-block-fold-vcmp.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-block-kill.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-block-optnone.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-blocks.ll
…
mve-vpt-from-intrinsics.ll
…
mve-vpt-nots.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-optimisations.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vpt-preuse.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
mve-vqdmulh-minmax.ll
[ARM] Fix VQDMULH fold for scalar smin
2021-08-21 16:33:18 +01:00
mve-vqdmulh.ll
[ARM] CSINC/CSINV patterns from CMOV
2021-11-27 20:21:41 +00:00
mve-vqmovn-combine.ll
…
mve-vqmovn.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-vqshrn.ll
[ARM] Extend IsCMPZCSINC to handle CMOV
2021-12-27 14:15:03 +00:00
mve-vselect-constants.ll
[ARM] Peek through And 1 in IsCMPZCSINC
2021-12-08 15:40:23 +00:00
mve-vst2-post.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vst2.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vst3.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vst4-post.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vst4.ll
[ARM] Enable subreg liveness
2021-08-17 14:10:33 +01:00
mve-vsubqr.ll
…
mve-widen-narrow.ll
[ARM] Introduce MVEEXT ISel lowering
2021-07-13 07:21:20 +01:00
mve-wls-block-placement.mir
[ARM] Fix Arm block placement creating branches after jump tables.
2021-09-25 11:32:25 +01:00
mve-zext-masked-load.ll
[ARM] Move VPTBlock pass after post-ra scheduling
2021-11-04 18:42:12 +00:00
pacbti-m-basic.ll
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
pacbti-m-indirect-tail-call.ll
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
pacbti-m-outliner-1.ll
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
pacbti-m-outliner-2.ll
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
pacbti-m-outliner-3.ll
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
pacbti-m-outliner-4.ll
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
pacbti-m-outliner-5.ll
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
pacbti-m-overalign.ll
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
pacbti-m-unsupported-arch.ll
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
pacbti-m-varargs-1.ll
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
pacbti-m-varargs-2.ll
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
pacbti-m-vla.ll
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
peephole-addsub.mir
…
peephole-cmp.mir
…
phi_prevent_copy.mir
[ARM] Add a tail-predication loop predicate register
2021-09-02 13:42:58 +01:00
pic-load.ll
…
postinc-distribute.mir
[ARM] Introduce i8neg and i8pos addressing modes
2021-12-02 17:10:26 +00:00
scavenge-lr.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
schedm7-hazard.ll
…
segmented-stacks.ll
…
setjmp_longjmp.ll
[NFC][Codegen] Autogenerate Thumb2/setjmp_longjmp.ll test
2021-06-24 21:35:05 +03:00
shift_parts.ll
…
srem-seteq-illegal-types.ll
RegAllocGreedy: Account for reserved registers in num regs heuristic
2021-09-14 21:00:29 -04:00
stack_guard_remat.ll
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
store-prepostinc.mir
[ARM] Correct range in isLegalAddressImm
2021-12-02 11:33:40 +00:00
t2-teq-reduce.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
t2peephole-t2ADDrr-to-t2ADDri.ll
…
t2sizereduction.mir
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
tail-call-r9.ll
…
tbb-removeadd.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
thumb2-adc.ll
…
thumb2-add2.ll
…
thumb2-add3.ll
…
thumb2-add4.ll
…
thumb2-add5.ll
…
thumb2-add6.ll
…
thumb2-add.ll
…
thumb2-and2.ll
…
thumb2-and.ll
…
thumb2-asr2.ll
…
thumb2-asr.ll
…
thumb2-bcc.ll
…
thumb2-bfc.ll
…
thumb2-bic.ll
…
thumb2-branch.ll
…
thumb2-call-tc.ll
…
thumb2-call.ll
…
thumb2-cbnz.ll
…
thumb2-clz.ll
…
thumb2-cmn2.ll
…
thumb2-cmn.ll
…
thumb2-cmp.ll
…
thumb2-cpsr-liveness.ll
…
thumb2-eor2.ll
…
thumb2-eor.ll
…
thumb2-execute-only-prologue.ll
…
thumb2-ifcvt1-tc.ll
…
thumb2-ifcvt1.ll
[SimplifyCFG] Tail-merging all blocks with ret terminator
2021-06-24 13:15:39 +03:00
thumb2-ifcvt2.ll
…
thumb2-ifcvt3.ll
…
thumb2-jtb.ll
…
thumb2-ldm.ll
…
thumb2-ldr_ext.ll
…
thumb2-ldr_post.ll
…
thumb2-ldr_pre.ll
…
thumb2-ldr.ll
…
thumb2-ldrb.ll
…
thumb2-ldrd.ll
…
thumb2-ldrh.ll
…
thumb2-lsl2.ll
…
thumb2-lsl.ll
…
thumb2-lsr2.ll
…
thumb2-lsr3.ll
…
thumb2-lsr.ll
…
thumb2-mla.ll
…
thumb2-mls.ll
…
thumb2-mov.ll
…
thumb2-mul.ll
…
thumb2-mulhi.ll
…
thumb2-mvn2.ll
…
thumb2-mvn.ll
…
thumb2-neg.ll
…
thumb2-orn2.ll
…
thumb2-orn.ll
…
thumb2-orr2.ll
…
thumb2-orr.ll
…
thumb2-pack.ll
…
thumb2-rev16.ll
…
thumb2-rev.ll
…
thumb2-ror.ll
…
thumb2-rsb2.ll
…
thumb2-rsb.ll
…
thumb2-sbc.ll
…
thumb2-select_xform.ll
…
thumb2-select.ll
…
thumb2-shifter.ll
…
thumb2-smla.ll
…
thumb2-smul.ll
…
thumb2-spill-q.ll
…
thumb2-str_post.ll
…
thumb2-str_pre.ll
…
thumb2-str.ll
…
thumb2-strb.ll
…
thumb2-strh.ll
…
thumb2-sub2.ll
…
thumb2-sub3.ll
…
thumb2-sub4.ll
…
thumb2-sub5.ll
…
thumb2-sub.ll
…
thumb2-sxt_rot.ll
[Thumb2] Regenerate ext + rot tests
2021-11-21 18:33:28 +00:00
thumb2-sxt-uxt.ll
…
thumb2-tbb.ll
…
thumb2-tbh.ll
…
thumb2-teq2.ll
…
thumb2-teq.ll
…
thumb2-tst2.ll
…
thumb2-tst.ll
…
thumb2-uxt_rot.ll
[Thumb2] Regenerate ext + rot tests
2021-11-21 18:33:28 +00:00
thumb2-uxtb.ll
…
tls1.ll
…
tls2.ll
…
tpsoft.ll
[SimplifyCFG] Tail-merging all blocks with ret terminator
2021-06-24 13:15:39 +03:00
umulo-64-legalisation-lowering.ll
…
umulo-128-legalisation-lowering.ll
Do not generate calls to the 128-bit function __multi3() on 32-bit ARM
2021-06-11 11:45:21 +01:00
unreachable-large-offset-gep.ll
…
urem-seteq-illegal-types.ll
Support {S,U}REMEqFold before legalization
2021-04-01 01:35:41 +03:00
v8_deprecate_IT.ll
…
v8_IT_1.ll
…
v8_IT_2.ll
…
v8_IT_3.ll
…
v8_IT_4.ll
[SimplifyCFG] Tail-merging all blocks with ret terminator
2021-06-24 13:15:39 +03:00
v8_IT_5.ll
…
v8_IT_6.ll
…
vmovdrroffset.ll
…
vqabs.ll
…
vqneg.ll
…