6599961c17
This patch contains following enhancements to SrcRegMap and DstRegMap:
1 In findOnlyInterestingUse not only check if the Reg is two address usage,
but also check after commutation can it be two address usage.
2 If a physical register is clobbered, remove SrcRegMap entries that are
mapped to it.
3 In processTiedPairs, when create a new COPY instruction, add a SrcRegMap
entry only when the COPY instruction is coalescable. (The COPY src is
killed)
With these enhancements isProfitableToCommute can do better commute decision,
and finally more register copies are removed.
Differential Revision: https://reviews.llvm.org/D108731
273 lines
8.1 KiB
LLVM
273 lines
8.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X86,NOBMI-X86
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; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefixes=X86,BMI-X86
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X64,NOBMI-X64
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefixes=X64,BMI-X64
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; Fold
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; ptr - (ptr & (alignment-1))
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; To
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; ptr & (0 - alignment)
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;
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; This needs to be a backend-level fold because only by now pointers
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; are just registers; in middle-end IR this can only be done via @llvm.ptrmask()
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; intrinsic which is not sufficiently widely-spread yet.
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;
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; https://bugs.llvm.org/show_bug.cgi?id=44448
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; The basic positive tests
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define i32 @t0_32(i32 %ptr, i32 %alignment) nounwind {
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; X86-LABEL: t0_32:
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; X86: # %bb.0:
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: t0_32:
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; X64: # %bb.0:
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: negl %eax
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; X64-NEXT: andl %edi, %eax
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; X64-NEXT: retq
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%mask = add i32 %alignment, -1
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%bias = and i32 %ptr, %mask
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%r = sub i32 %ptr, %bias
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ret i32 %r
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}
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define i64 @t1_64(i64 %ptr, i64 %alignment) nounwind {
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; X86-LABEL: t1_64:
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; X86: # %bb.0:
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: sbbl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: andl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: t1_64:
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; X64: # %bb.0:
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; X64-NEXT: movq %rsi, %rax
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; X64-NEXT: negq %rax
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; X64-NEXT: andq %rdi, %rax
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; X64-NEXT: retq
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%mask = add i64 %alignment, -1
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%bias = and i64 %ptr, %mask
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%r = sub i64 %ptr, %bias
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ret i64 %r
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}
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define i32 @t2_commutative(i32 %ptr, i32 %alignment) nounwind {
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; X86-LABEL: t2_commutative:
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; X86: # %bb.0:
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: t2_commutative:
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; X64: # %bb.0:
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: negl %eax
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; X64-NEXT: andl %edi, %eax
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; X64-NEXT: retq
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%mask = add i32 %alignment, -1
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%bias = and i32 %mask, %ptr ; swapped
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%r = sub i32 %ptr, %bias
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ret i32 %r
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}
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; Extra use tests
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define i32 @t3_extrause0(i32 %ptr, i32 %alignment, i32* %mask_storage) nounwind {
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; X86-LABEL: t3_extrause0:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: leal -1(%eax), %edx
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; X86-NEXT: movl %edx, (%ecx)
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; X86-NEXT: negl %eax
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; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: t3_extrause0:
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; X64: # %bb.0:
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: leal -1(%rax), %ecx
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; X64-NEXT: movl %ecx, (%rdx)
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; X64-NEXT: negl %eax
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; X64-NEXT: andl %edi, %eax
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; X64-NEXT: # kill: def $eax killed $eax killed $rax
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; X64-NEXT: retq
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%mask = add i32 %alignment, -1
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store i32 %mask, i32* %mask_storage
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%bias = and i32 %ptr, %mask
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%r = sub i32 %ptr, %bias
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ret i32 %r
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}
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define i32 @n4_extrause1(i32 %ptr, i32 %alignment, i32* %bias_storage) nounwind {
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; X86-LABEL: n4_extrause1:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: decl %edx
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; X86-NEXT: andl %eax, %edx
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; X86-NEXT: movl %edx, (%ecx)
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; X86-NEXT: subl %edx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: n4_extrause1:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: decl %esi
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; X64-NEXT: andl %edi, %esi
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; X64-NEXT: movl %esi, (%rdx)
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; X64-NEXT: subl %esi, %eax
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; X64-NEXT: retq
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%mask = add i32 %alignment, -1
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%bias = and i32 %ptr, %mask ; has extra uses, can't fold
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store i32 %bias, i32* %bias_storage
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%r = sub i32 %ptr, %bias
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ret i32 %r
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}
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define i32 @n5_extrause2(i32 %ptr, i32 %alignment, i32* %mask_storage, i32* %bias_storage) nounwind {
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; X86-LABEL: n5_extrause2:
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; X86: # %bb.0:
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: decl %esi
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; X86-NEXT: movl %esi, (%edx)
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; X86-NEXT: andl %eax, %esi
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; X86-NEXT: movl %esi, (%ecx)
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; X86-NEXT: subl %esi, %eax
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; X86-NEXT: popl %esi
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; X86-NEXT: retl
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;
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; X64-LABEL: n5_extrause2:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: decl %esi
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; X64-NEXT: movl %esi, (%rdx)
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; X64-NEXT: andl %edi, %esi
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; X64-NEXT: movl %esi, (%rcx)
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; X64-NEXT: subl %esi, %eax
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; X64-NEXT: retq
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%mask = add i32 %alignment, -1
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store i32 %mask, i32* %mask_storage
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%bias = and i32 %ptr, %mask ; has extra uses, can't fold
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store i32 %bias, i32* %bias_storage
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%r = sub i32 %ptr, %bias
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ret i32 %r
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}
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; Negative tests
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define i32 @n6_different_ptrs(i32 %ptr0, i32 %ptr1, i32 %alignment) nounwind {
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; X86-LABEL: n6_different_ptrs:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: decl %ecx
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; X86-NEXT: andl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: subl %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: n6_different_ptrs:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: decl %edx
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; X64-NEXT: andl %esi, %edx
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; X64-NEXT: subl %edx, %eax
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; X64-NEXT: retq
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%mask = add i32 %alignment, -1
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%bias = and i32 %ptr1, %mask ; not %ptr0
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%r = sub i32 %ptr0, %bias ; not %ptr1
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ret i32 %r
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}
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define i32 @n7_different_ptrs_commutative(i32 %ptr0, i32 %ptr1, i32 %alignment) nounwind {
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; X86-LABEL: n7_different_ptrs_commutative:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: decl %ecx
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; X86-NEXT: andl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: subl %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: n7_different_ptrs_commutative:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: decl %edx
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; X64-NEXT: andl %esi, %edx
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; X64-NEXT: subl %edx, %eax
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; X64-NEXT: retq
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%mask = add i32 %alignment, -1
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%bias = and i32 %mask, %ptr1 ; swapped, not %ptr0
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%r = sub i32 %ptr0, %bias ; not %ptr1
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ret i32 %r
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}
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define i32 @n8_not_lowbit_mask(i32 %ptr, i32 %alignment) nounwind {
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; NOBMI-X86-LABEL: n8_not_lowbit_mask:
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; NOBMI-X86: # %bb.0:
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; NOBMI-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; NOBMI-X86-NEXT: incl %eax
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; NOBMI-X86-NEXT: notl %eax
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; NOBMI-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
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; NOBMI-X86-NEXT: retl
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;
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; BMI-X86-LABEL: n8_not_lowbit_mask:
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; BMI-X86: # %bb.0:
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; BMI-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; BMI-X86-NEXT: incl %eax
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; BMI-X86-NEXT: andnl {{[0-9]+}}(%esp), %eax, %eax
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; BMI-X86-NEXT: retl
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;
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; NOBMI-X64-LABEL: n8_not_lowbit_mask:
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; NOBMI-X64: # %bb.0:
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; NOBMI-X64-NEXT: # kill: def $esi killed $esi def $rsi
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; NOBMI-X64-NEXT: leal 1(%rsi), %eax
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; NOBMI-X64-NEXT: notl %eax
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; NOBMI-X64-NEXT: andl %edi, %eax
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; NOBMI-X64-NEXT: retq
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;
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; BMI-X64-LABEL: n8_not_lowbit_mask:
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; BMI-X64: # %bb.0:
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; BMI-X64-NEXT: incl %esi
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; BMI-X64-NEXT: andnl %edi, %esi, %eax
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; BMI-X64-NEXT: retq
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%mask = add i32 %alignment, 1 ; not -1
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%bias = and i32 %ptr, %mask
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%r = sub i32 %ptr, %bias
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ret i32 %r
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}
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define i32 @n9_sub_is_not_commutative(i32 %ptr, i32 %alignment) nounwind {
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; X86-LABEL: n9_sub_is_not_commutative:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: decl %eax
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; X86-NEXT: andl %ecx, %eax
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; X86-NEXT: subl %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: n9_sub_is_not_commutative:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $esi killed $esi def $rsi
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; X64-NEXT: leal -1(%rsi), %eax
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; X64-NEXT: andl %edi, %eax
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; X64-NEXT: subl %edi, %eax
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; X64-NEXT: retq
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%mask = add i32 %alignment, -1
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%bias = and i32 %ptr, %mask
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%r = sub i32 %bias, %ptr ; wrong order
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ret i32 %r
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}
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