f1d8345a2a
Currently we create register mappings for registers used only once in current
MBB. For registers with multiple uses, when all the uses are in the current MBB,
we can also create mappings for them similarly according to the last use.
For example
%reg101 = ...
= ... reg101
%reg103 = ADD %reg101, %reg102
We can create mapping between %reg101 and %reg103.
Differential Revision: https://reviews.llvm.org/D113193
363 lines
10 KiB
LLVM
363 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+bmi,+bmi2,+cmov | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefix=X64
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define i32 @bzhi32(i32 %x, i32 %y) {
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; X86-LABEL: bzhi32:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: addl %ecx, %ecx
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; X86-NEXT: bzhil %eax, %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: bzhi32:
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; X64: # %bb.0:
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; X64-NEXT: addl %edi, %edi
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; X64-NEXT: bzhil %esi, %edi, %eax
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; X64-NEXT: retq
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%x1 = add i32 %x, %x
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%tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x1, i32 %y)
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ret i32 %tmp
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}
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define i32 @bzhi32_load(i32* %x, i32 %y) {
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; X86-LABEL: bzhi32_load:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: bzhil %eax, (%ecx), %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: bzhi32_load:
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; X64: # %bb.0:
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; X64-NEXT: bzhil %esi, (%rdi), %eax
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; X64-NEXT: retq
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%x1 = load i32, i32* %x
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%tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x1, i32 %y)
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ret i32 %tmp
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}
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; PR48768 - 'bzhi' clears the overflow flag, so we don't need a separate 'test'.
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define i1 @bzhi32_overflow(i32 %x, i32 %y) {
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; X86-LABEL: bzhi32_overflow:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: bzhil %eax, {{[0-9]+}}(%esp), %eax
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; X86-NEXT: setle %al
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; X86-NEXT: retl
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;
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; X64-LABEL: bzhi32_overflow:
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; X64: # %bb.0:
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; X64-NEXT: bzhil %esi, %edi, %eax
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; X64-NEXT: setle %al
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; X64-NEXT: retq
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%tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x, i32 %y)
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%cmp = icmp slt i32 %tmp, 1
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ret i1 %cmp
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}
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declare i32 @llvm.x86.bmi.bzhi.32(i32, i32)
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define i32 @pdep32(i32 %x, i32 %y) {
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; X86-LABEL: pdep32:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: addl %ecx, %ecx
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; X86-NEXT: pdepl %ecx, %eax, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: pdep32:
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; X64: # %bb.0:
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; X64-NEXT: addl %esi, %esi
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; X64-NEXT: pdepl %esi, %edi, %eax
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; X64-NEXT: retq
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%y1 = add i32 %y, %y
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%tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y1)
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ret i32 %tmp
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}
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define i32 @pdep32_load(i32 %x, i32* %y) {
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; X86-LABEL: pdep32_load:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: pdepl (%eax), %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: pdep32_load:
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; X64: # %bb.0:
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; X64-NEXT: pdepl (%rsi), %edi, %eax
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; X64-NEXT: retq
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%y1 = load i32, i32* %y
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%tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y1)
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ret i32 %tmp
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}
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define i32 @pdep32_anyext(i16 %x) {
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; X86-LABEL: pdep32_anyext:
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; X86: # %bb.0:
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; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl $-1431655766, %ecx # imm = 0xAAAAAAAA
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; X86-NEXT: pdepl %ecx, %eax, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: pdep32_anyext:
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; X64: # %bb.0:
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; X64-NEXT: movl $-1431655766, %eax # imm = 0xAAAAAAAA
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; X64-NEXT: pdepl %eax, %edi, %eax
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; X64-NEXT: retq
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%x1 = sext i16 %x to i32
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%tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x1, i32 -1431655766)
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ret i32 %tmp
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}
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define i32 @pdep32_demandedbits(i32 %x) {
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; X86-LABEL: pdep32_demandedbits:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl $1431655765, %ecx # imm = 0x55555555
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; X86-NEXT: pdepl %ecx, %eax, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: pdep32_demandedbits:
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; X64: # %bb.0:
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; X64-NEXT: movl $1431655765, %eax # imm = 0x55555555
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; X64-NEXT: pdepl %eax, %edi, %eax
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; X64-NEXT: retq
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%tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 1431655765)
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%tmp2 = and i32 %tmp, 1431655765
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ret i32 %tmp2
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}
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define i32 @pdep32_demandedbits2(i32 %x, i32 %y) {
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; X86-LABEL: pdep32_demandedbits2:
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; X86: # %bb.0:
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: pdepl {{[0-9]+}}(%esp), %eax, %eax
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; X86-NEXT: andl $128, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: pdep32_demandedbits2:
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; X64: # %bb.0:
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; X64-NEXT: pdepl %esi, %edi, %eax
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; X64-NEXT: andl $128, %eax
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; X64-NEXT: retq
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%tmp = and i32 %x, 255
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%tmp2 = tail call i32 @llvm.x86.bmi.pdep.32(i32 %tmp, i32 %y)
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%tmp3 = and i32 %tmp2, 128
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ret i32 %tmp3
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}
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define i32 @pdep32_demandedbits_mask(i32 %x, i16 %y) {
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; X86-LABEL: pdep32_demandedbits_mask:
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; X86: # %bb.0:
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; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: pdepl %eax, %ecx, %eax
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; X86-NEXT: andl $32768, %eax # imm = 0x8000
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; X86-NEXT: retl
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;
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; X64-LABEL: pdep32_demandedbits_mask:
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; X64: # %bb.0:
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; X64-NEXT: pdepl %esi, %edi, %eax
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; X64-NEXT: andl $32768, %eax # imm = 0x8000
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; X64-NEXT: retq
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%tmp = sext i16 %y to i32
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%tmp2 = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %tmp)
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%tmp3 = and i32 %tmp2, 32768
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ret i32 %tmp3
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}
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define i32 @pdep32_demandedbits_mask2(i32 %x, i16 %y) {
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; X86-LABEL: pdep32_demandedbits_mask2:
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; X86: # %bb.0:
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; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: pdepl %eax, %ecx, %eax
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; X86-NEXT: movzwl %ax, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: pdep32_demandedbits_mask2:
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; X64: # %bb.0:
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; X64-NEXT: pdepl %esi, %edi, %eax
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; X64-NEXT: movzwl %ax, %eax
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; X64-NEXT: retq
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%tmp = sext i16 %y to i32
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%tmp2 = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %tmp)
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%tmp3 = and i32 %tmp2, 65535
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ret i32 %tmp3
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}
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define i32 @pdep32_knownbits(i32 %x) {
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; X86-LABEL: pdep32_knownbits:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl $1431655765, %ecx # imm = 0x55555555
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; X86-NEXT: pdepl %ecx, %eax, %eax
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; X86-NEXT: imull %eax, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: pdep32_knownbits:
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; X64: # %bb.0:
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; X64-NEXT: movl $1431655765, %eax # imm = 0x55555555
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; X64-NEXT: pdepl %eax, %edi, %eax
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; X64-NEXT: imull %eax, %eax
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; X64-NEXT: retq
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%tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 1431655765)
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%tmp2 = and i32 %tmp, 1431655765
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%tmp3 = mul i32 %tmp, %tmp2
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ret i32 %tmp3
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}
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define i32 @pdep32_knownbits2(i32 %x, i32 %y) {
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; X86-LABEL: pdep32_knownbits2:
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; X86: # %bb.0:
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; X86-NEXT: movl $-256, %eax
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; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: pdepl {{[0-9]+}}(%esp), %eax, %eax
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; X86-NEXT: imull %eax, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: pdep32_knownbits2:
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; X64: # %bb.0:
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; X64-NEXT: andl $-256, %edi
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; X64-NEXT: pdepl %esi, %edi, %eax
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; X64-NEXT: imull %eax, %eax
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; X64-NEXT: retq
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%tmp = and i32 %x, -256
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%tmp2 = tail call i32 @llvm.x86.bmi.pdep.32(i32 %tmp, i32 %y)
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%tmp3 = and i32 %tmp2, -256
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%tmp4 = mul i32 %tmp2, %tmp3
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ret i32 %tmp4
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}
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declare i32 @llvm.x86.bmi.pdep.32(i32, i32)
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define i32 @pext32(i32 %x, i32 %y) {
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; X86-LABEL: pext32:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: addl %ecx, %ecx
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; X86-NEXT: pextl %ecx, %eax, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: pext32:
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; X64: # %bb.0:
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; X64-NEXT: addl %esi, %esi
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; X64-NEXT: pextl %esi, %edi, %eax
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; X64-NEXT: retq
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%y1 = add i32 %y, %y
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%tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y1)
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ret i32 %tmp
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}
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define i32 @pext32_load(i32 %x, i32* %y) {
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; X86-LABEL: pext32_load:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: pextl (%eax), %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: pext32_load:
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; X64: # %bb.0:
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; X64-NEXT: pextl (%rsi), %edi, %eax
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; X64-NEXT: retq
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%y1 = load i32, i32* %y
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%tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y1)
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ret i32 %tmp
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}
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define i32 @pext32_knownbits(i32 %x) {
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; X86-LABEL: pext32_knownbits:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl $1431655765, %ecx # imm = 0x55555555
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; X86-NEXT: pextl %ecx, %eax, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: pext32_knownbits:
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; X64: # %bb.0:
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; X64-NEXT: movl $1431655765, %eax # imm = 0x55555555
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; X64-NEXT: pextl %eax, %edi, %eax
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; X64-NEXT: retq
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%tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 1431655765)
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%tmp2 = and i32 %tmp, 65535
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ret i32 %tmp2
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}
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declare i32 @llvm.x86.bmi.pext.32(i32, i32)
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define i32 @mulx32(i32 %x, i32 %y, i32* %p) {
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; X86-LABEL: mulx32:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: addl %edx, %edx
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; X86-NEXT: addl %eax, %eax
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; X86-NEXT: mulxl %eax, %eax, %edx
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; X86-NEXT: movl %edx, (%ecx)
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; X86-NEXT: retl
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;
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; X64-LABEL: mulx32:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $esi killed $esi def $rsi
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: addl %edi, %edi
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; X64-NEXT: leal (%rsi,%rsi), %eax
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; X64-NEXT: imulq %rdi, %rax
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; X64-NEXT: movq %rax, %rcx
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; X64-NEXT: shrq $32, %rcx
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; X64-NEXT: movl %ecx, (%rdx)
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; X64-NEXT: # kill: def $eax killed $eax killed $rax
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; X64-NEXT: retq
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%x1 = add i32 %x, %x
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%y1 = add i32 %y, %y
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%x2 = zext i32 %x1 to i64
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%y2 = zext i32 %y1 to i64
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%r1 = mul i64 %x2, %y2
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%h1 = lshr i64 %r1, 32
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%h = trunc i64 %h1 to i32
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%l = trunc i64 %r1 to i32
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store i32 %h, i32* %p
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ret i32 %l
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}
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define i32 @mulx32_load(i32 %x, i32* %y, i32* %p) {
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; X86-LABEL: mulx32_load:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: addl %edx, %edx
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; X86-NEXT: mulxl (%eax), %eax, %edx
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; X86-NEXT: movl %edx, (%ecx)
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; X86-NEXT: retl
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;
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; X64-LABEL: mulx32_load:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: leal (%rdi,%rdi), %eax
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; X64-NEXT: movl (%rsi), %ecx
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; X64-NEXT: imulq %rcx, %rax
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; X64-NEXT: movq %rax, %rcx
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; X64-NEXT: shrq $32, %rcx
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; X64-NEXT: movl %ecx, (%rdx)
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; X64-NEXT: # kill: def $eax killed $eax killed $rax
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; X64-NEXT: retq
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%x1 = add i32 %x, %x
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%y1 = load i32, i32* %y
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%x2 = zext i32 %x1 to i64
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%y2 = zext i32 %y1 to i64
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%r1 = mul i64 %x2, %y2
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%h1 = lshr i64 %r1, 32
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%h = trunc i64 %h1 to i32
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%l = trunc i64 %r1 to i32
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store i32 %h, i32* %p
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ret i32 %l
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}
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