892c731681
Instead of summing leading zeros on the input operands, multiply the max possible values of those inputs and count the leading zeros of the result. This can give us an extra zero bit (typically in cases where one of the operands is a known constant). This allows folding away the remaining 'add' ops in the motivating bug (modeled in the PhaseOrdering IR test): https://github.com/llvm/llvm-project/issues/48399 Fixes #48399 Differential Revision: https://reviews.llvm.org/D115969