7cb19fe493
There is a bug in the reordering analysis stage. If the element with the given hash is not added to the map but has the same number of APOs and instructions with same parent, but different instruction opcode, it will be initalized with default values and then the counter is increased by 1. But the lane is not updated and default to 0 instead of the actual `Lane` value. It leads to the fact that the analysis is useless in many cases and default to lane 0 instead of actual lane with the minimum amount of APO operands. Differential Revision: https://reviews.llvm.org/D116690
66 lines
3.7 KiB
LLVM
66 lines
3.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -slp-vectorizer -S -o - -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
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%struct.sw = type { float, float, float, float }
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define { <2 x float>, <2 x float> } @foo(%struct.sw* %v) {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = load float, float* undef, align 4
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; CHECK-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_SW:%.*]], %struct.sw* [[V:%.*]], i64 0, i32 0
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; CHECK-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_SW]], %struct.sw* [[V]], i64 0, i32 1
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[X]] to <2 x float>*
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; CHECK-NEXT: [[TMP2:%.*]] = load <2 x float>, <2 x float>* [[TMP1]], align 16
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; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 1, i32 0, i32 0, i32 1>
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; CHECK-NEXT: [[TMP3:%.*]] = load float, float* undef, align 4
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; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i32 0
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; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> [[TMP4]], float [[TMP3]], i32 1
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; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <4 x float> [[TMP5]], <4 x float> poison, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
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; CHECK-NEXT: [[TMP6:%.*]] = fmul <4 x float> [[SHUFFLE]], [[SHUFFLE1]]
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; CHECK-NEXT: [[TMP7:%.*]] = fadd <4 x float> [[TMP6]], poison
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; CHECK-NEXT: [[TMP8:%.*]] = fadd <4 x float> [[TMP7]], poison
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; CHECK-NEXT: [[TMP9:%.*]] = fadd <4 x float> [[TMP8]], poison
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; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x float> [[TMP9]], i32 0
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; CHECK-NEXT: [[VEC1:%.*]] = insertelement <2 x float> undef, float [[TMP10]], i32 0
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; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x float> [[TMP9]], i32 1
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; CHECK-NEXT: [[VEC2:%.*]] = insertelement <2 x float> [[VEC1]], float [[TMP11]], i32 1
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; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x float> [[TMP9]], i32 2
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; CHECK-NEXT: [[VEC3:%.*]] = insertelement <2 x float> undef, float [[TMP12]], i32 0
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; CHECK-NEXT: [[TMP13:%.*]] = extractelement <4 x float> [[TMP9]], i32 3
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; CHECK-NEXT: [[VEC4:%.*]] = insertelement <2 x float> [[VEC3]], float [[TMP13]], i32 1
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; CHECK-NEXT: [[INS1:%.*]] = insertvalue { <2 x float>, <2 x float> } undef, <2 x float> [[VEC2]], 0
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; CHECK-NEXT: [[INS2:%.*]] = insertvalue { <2 x float>, <2 x float> } [[INS1]], <2 x float> [[VEC4]], 1
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; CHECK-NEXT: ret { <2 x float>, <2 x float> } [[INS2]]
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;
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entry:
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%0 = load float, float* undef, align 4
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%x = getelementptr inbounds %struct.sw, %struct.sw* %v, i64 0, i32 0
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%1 = load float, float* %x, align 16
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%y = getelementptr inbounds %struct.sw, %struct.sw* %v, i64 0, i32 1
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%2 = load float, float* %y, align 4
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%mul3 = fmul float %0, %2
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%add = fadd float undef, %mul3
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%add6 = fadd float %add, undef
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%add9 = fadd float %add6, undef
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%mul12 = fmul float %1, undef
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%add16 = fadd float %mul12, undef
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%add20 = fadd float undef, %add16
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%add24 = fadd float undef, %add20
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%3 = load float, float* undef, align 4
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%mul27 = fmul float %1, %3
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%add31 = fadd float %mul27, undef
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%add35 = fadd float undef, %add31
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%add39 = fadd float undef, %add35
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%mul45 = fmul float %2, undef
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%add46 = fadd float undef, %mul45
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%add50 = fadd float undef, %add46
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%add54 = fadd float undef, %add50
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%vec1 = insertelement <2 x float> undef, float %add9, i32 0
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%vec2 = insertelement <2 x float> %vec1, float %add24, i32 1
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%vec3 = insertelement <2 x float> undef, float %add39, i32 0
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%vec4 = insertelement <2 x float> %vec3, float %add54, i32 1
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%ins1 = insertvalue { <2 x float>, <2 x float> } undef, <2 x float> %vec2, 0
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%ins2 = insertvalue { <2 x float>, <2 x float> } %ins1, <2 x float> %vec4, 1
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ret { <2 x float>, <2 x float> } %ins2
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}
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