1d0005a69a
- rename `GISelKnownBits` to `GISelValueTracking` to analyze more than just `KnownBits` in the future
51 lines
1.9 KiB
C++
51 lines
1.9 KiB
C++
//=== lib/CodeGen/GlobalISel/AMDGPUCombinerHelper.h -------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This contains common combine transformations that may be used in a combine
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/// pass.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUCOMBINERHELPER_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUCOMBINERHELPER_H
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#include "GCNSubtarget.h"
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#include "llvm/CodeGen/GlobalISel/Combiner.h"
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#include "llvm/CodeGen/GlobalISel/CombinerHelper.h"
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namespace llvm {
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class AMDGPUCombinerHelper : public CombinerHelper {
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protected:
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const GCNSubtarget &STI;
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const SIInstrInfo &TII;
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public:
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using CombinerHelper::CombinerHelper;
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AMDGPUCombinerHelper(GISelChangeObserver &Observer, MachineIRBuilder &B,
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bool IsPreLegalize, GISelValueTracking *VT,
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MachineDominatorTree *MDT, const LegalizerInfo *LI,
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const GCNSubtarget &STI);
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bool matchFoldableFneg(MachineInstr &MI, MachineInstr *&MatchInfo) const;
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void applyFoldableFneg(MachineInstr &MI, MachineInstr *&MatchInfo) const;
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bool matchExpandPromotedF16FMed3(MachineInstr &MI, Register Src0,
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Register Src1, Register Src2) const;
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void applyExpandPromotedF16FMed3(MachineInstr &MI, Register Src0,
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Register Src1, Register Src2) const;
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bool matchCombineFmulWithSelectToFldexp(
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MachineInstr &MI, MachineInstr &Sel,
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std::function<void(MachineIRBuilder &)> &MatchInfo) const;
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};
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} // namespace llvm
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#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUCOMBINERHELPER_H
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