It is documented that immarg is only valid on intrinsic declarations, although the verifier also tolerates it on intrinsic calls. This patch updates tests that are not specifically testing the behavior of the IR parser or verifier.
35 lines
1.5 KiB
LLVM
35 lines
1.5 KiB
LLVM
; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx900 -filetype=obj -o %t.o < %s && llvm-readobj -r %t.o | FileCheck --check-prefix=ELF %s
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; RUN: llc -global-isel -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -global-isel -mtriple=amdgcn--amdpal -mcpu=gfx900 -filetype=obj -o %t.o < %s && llvm-readobj -r %t.o | FileCheck --check-prefix=ELF %s
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; GCN-LABEL: {{^}}ps_main:
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; GCN: v_mov_b32_{{.*}} v[[relocreg:[0-9]+]], doff_0_0_b@abs32@lo
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; GCN-NEXT: exp {{.*}} v[[relocreg]], {{.*}}
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; GCN-NEXT: s_endpgm
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; GCN-NEXT: .Lfunc_end
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; ELF: Relocations [
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; ELF-NEXT: Section (3) .rel.text {
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; ELF-NEXT: 0x{{[0-9]+}} R_AMDGPU_ABS32_LO doff_0_0_b{{$}}
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define amdgpu_ps void @ps_main(i32 %arg, i32 inreg %arg1, i32 inreg %arg2) local_unnamed_addr #0 {
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%rc = call i32 @llvm.amdgcn.reloc.constant(metadata !1)
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%rcf = bitcast i32 %rc to float
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call void @llvm.amdgcn.exp.f32(i32 40, i32 15, float %rcf, float undef, float undef, float undef, i1 false, i1 false) #0
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ret void
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}
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; Function Attrs: inaccessiblememonly nounwind
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declare void @llvm.amdgcn.exp.f32(i32 immarg, i32 immarg, float, float, float, float, i1 immarg, i1 immarg) #1
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; Function Attrs: nounwind readnone speculatable
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declare i32 @llvm.amdgcn.reloc.constant(metadata) #2
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attributes #0 = { nounwind }
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attributes #1 = { inaccessiblememonly nounwind }
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attributes #2 = { nounwind readnone speculatable }
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!1 = !{!"doff_0_0_b"}
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