981bb9dcc9
Use DXILResourceWrapperPass to build the resource table. Since DXILResourceWrapperPass operates on LLVM intrinsics rather than DXIL operations, add addPreserved for DXILResourceWrapperPass in the passes before DXContainerGlobals Fixes #103275
94 lines
3.5 KiB
LLVM
94 lines
3.5 KiB
LLVM
; RUN: llc %s --filetype=obj -o - | obj2yaml | FileCheck %s
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; Make sure resource table is created correctly.
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; CHECK: Resources:
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target triple = "dxil-unknown-shadermodel6.0-compute"
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define void @main() #0 {
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; ByteAddressBuffer Buf : register(t8, space1)
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; CHECK: - Type: SRVRaw
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; CHECK: Space: 1
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; CHECK: LowerBound: 8
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; CHECK: UpperBound: 8
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; CHECK: Kind: RawBuffer
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; CHECK: Flags:
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; CHECK: UsedByAtomic64: false
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%srv0 = call target("dx.RawBuffer", i8, 0, 0)
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@llvm.dx.handle.fromBinding.tdx.RawBuffer_i8_0_0t(
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i32 1, i32 8, i32 1, i32 0, i1 false)
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; struct S { float4 a; uint4 b; };
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; StructuredBuffer<S> Buf : register(t2, space4)
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; CHECK: - Type: SRVStructured
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; CHECK: Space: 4
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; CHECK: LowerBound: 2
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; CHECK: UpperBound: 2
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; CHECK: Kind: StructuredBuffer
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; CHECK: Flags:
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; CHECK: UsedByAtomic64: false
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%srv1 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0)
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@llvm.dx.handle.fromBinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0t(
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i32 4, i32 2, i32 1, i32 0, i1 false)
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; Buffer<uint4> Buf[24] : register(t3, space5)
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; CHECK: - Type: SRVTyped
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; CHECK: Space: 5
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; CHECK: LowerBound: 3
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; CHECK: UpperBound: 26
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; CHECK: Kind: TypedBuffer
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; CHECK: Flags:
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; CHECK: UsedByAtomic64: false
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%srv2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0)
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@llvm.dx.handle.fromBinding.tdx.TypedBuffer_i32_0_0t(
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i32 5, i32 3, i32 24, i32 0, i1 false)
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; RWBuffer<int> Buf : register(u7, space2)
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; CHECK: - Type: UAVTyped
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; CHECK: Space: 2
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; CHECK: LowerBound: 7
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; CHECK: UpperBound: 7
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; CHECK: Kind: TypedBuffer
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; CHECK: Flags:
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; CHECK: UsedByAtomic64: false
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%uav0 = call target("dx.TypedBuffer", i32, 1, 0, 1)
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@llvm.dx.handle.fromBinding.tdx.TypedBuffer_i32_1_0t(
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i32 2, i32 7, i32 1, i32 0, i1 false)
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; RWBuffer<float4> Buf : register(u5, space3)
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; CHECK: - Type: UAVTyped
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; CHECK: Space: 3
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; CHECK: LowerBound: 5
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; CHECK: UpperBound: 5
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; CHECK: Kind: TypedBuffer
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; CHECK: Flags:
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; CHECK: UsedByAtomic64: false
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%uav1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
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@llvm.dx.handle.fromBinding.tdx.TypedBuffer_f32_1_0(
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i32 3, i32 5, i32 1, i32 0, i1 false)
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; RWBuffer<float4> BufferArray[10] : register(u0, space4)
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; CHECK: - Type: UAVTyped
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; CHECK: Space: 4
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; CHECK: LowerBound: 0
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; CHECK: UpperBound: 9
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; CHECK: Kind: TypedBuffer
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; CHECK: Flags:
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; CHECK: UsedByAtomic64: false
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; RWBuffer<float4> Buf = BufferArray[0]
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%uav2_1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
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@llvm.dx.handle.fromBinding.tdx.TypedBuffer_f32_1_0(
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i32 4, i32 0, i32 10, i32 0, i1 false)
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; RWBuffer<float4> Buf = BufferArray[5]
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%uav2_2 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
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@llvm.dx.handle.fromBinding.tdx.TypedBuffer_f32_1_0(
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i32 4, i32 0, i32 10, i32 5, i1 false)
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ret void
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}
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attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
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!dx.valver = !{!0}
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!0 = !{i32 1, i32 7}
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