76e3759d8d
This patch sorts stack objects by their alignment value from the largest to the smallest. If two objects have the same alignment, then they are sorted by their size from the largest to the smallest. This minimizes padding and reduces run time stack size.
76 lines
2.6 KiB
LLVM
76 lines
2.6 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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target triple = "hexagon"
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; CHECK-LABEL: test1:
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; CHECK-DAG: memw(r29+#12) = ##875770417
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; CHECK-DAG: memw(r29+#8) = #51
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; CHECK-DAG: memh(r29+#6) = #50
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; CHECK-DAG: memb(r29+#5) = #49
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define void @test1() {
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b0:
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%v1 = alloca [1 x i8], align 1
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%v2 = alloca i16, align 2
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%v3 = alloca i32, align 4
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%v4 = alloca i32, align 4
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call void @llvm.lifetime.start(i64 1, ptr %v1)
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store i8 49, ptr %v1, align 1
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call void @llvm.lifetime.start(i64 2, ptr %v2)
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store i16 50, ptr %v2, align 2
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call void @llvm.lifetime.start(i64 4, ptr %v3)
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store i32 51, ptr %v3, align 4
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call void @llvm.lifetime.start(i64 4, ptr %v4)
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store i32 875770417, ptr %v4, align 4
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call void @test4(ptr %v1, ptr %v2, ptr %v3, ptr %v4)
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call void @llvm.lifetime.end(i64 4, ptr %v4)
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call void @llvm.lifetime.end(i64 4, ptr %v3)
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call void @llvm.lifetime.end(i64 2, ptr %v2)
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call void @llvm.lifetime.end(i64 1, ptr %v1)
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ret void
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}
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; CHECK-LABEL: test2:
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; CHECK-DAG: memw(r29+#8) = #51
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; CHECK-DAG: memh(r29+#6) = r{{[0-9]+}}
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; CHECK-DAG: memb(r29+#5) = r{{[0-9]+}}
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define void @test2() {
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b0:
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%v1 = alloca [1 x i8], align 1
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%v2 = alloca i16, align 2
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%v3 = alloca i32, align 4
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%v4 = alloca i32, align 4
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%v5 = alloca [100 x i8], align 8
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%v6 = alloca [101 x i8], align 8
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call void @llvm.lifetime.start(i64 1, ptr %v1)
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store i8 49, ptr %v1, align 1
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call void @llvm.lifetime.start(i64 2, ptr %v2)
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store i16 50, ptr %v2, align 2
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call void @llvm.lifetime.start(i64 4, ptr %v3)
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store i32 51, ptr %v3, align 4
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call void @llvm.lifetime.start(i64 4, ptr %v4)
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store i32 875770417, ptr %v4, align 4
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call void @llvm.lifetime.start(i64 100, ptr %v5)
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call void @llvm.memset.p0.i32(ptr align 8 %v5, i8 0, i32 100, i1 false)
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store i8 50, ptr %v5, align 8
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call void @llvm.lifetime.start(i64 101, ptr %v6)
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call void @llvm.memset.p0.i32(ptr align 8 %v6, i8 0, i32 101, i1 false)
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store i8 49, ptr %v6, align 8
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call void @test3(ptr %v1, ptr %v2, ptr %v3, ptr %v4, ptr %v5, ptr %v6)
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call void @llvm.lifetime.end(i64 101, ptr %v6)
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call void @llvm.lifetime.end(i64 100, ptr %v5)
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call void @llvm.lifetime.end(i64 4, ptr %v4)
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call void @llvm.lifetime.end(i64 4, ptr %v3)
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call void @llvm.lifetime.end(i64 2, ptr %v2)
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call void @llvm.lifetime.end(i64 1, ptr %v1)
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ret void
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}
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declare void @llvm.lifetime.start(i64, ptr nocapture) #0
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declare void @llvm.lifetime.end(i64, ptr nocapture) #0
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declare void @llvm.memset.p0.i32(ptr nocapture writeonly, i8, i32, i1) #0
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declare void @test3(ptr, ptr, ptr, ptr, ptr, ptr)
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declare void @test4(ptr, ptr, ptr, ptr)
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attributes #0 = { argmemonly nounwind "target-cpu"="hexagonv60" }
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