c4c9d4f306
Add support for the moveq instruction, which is both faster and smaller (1/2 to 1/3 the size) than a move with immediate to register. This change introduces the instruction, along with a set of pseudoinstructions to handle immediate moves to a register that is lowered post-RA. Pseudos are used as moveq can only write to the full register, which makes matching i8 and i16 immediate loads difficult in tablegen. Furthermore, selecting moveq before RA constrains that immediate to be moved into a data register, which may not be optimal. The bulk of this change are fixes to existing tests, which cover the new functionality sufficiently.
132 lines
3.3 KiB
LLVM
132 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -O2 -mtriple=m68k -verify-machineinstrs \
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; RUN: -code-model=medium -relocation-model=pic \
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; RUN: | FileCheck %s
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; External Linkage
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@a = global i32 0, align 4
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define i32 @my_access_global_a() #0 {
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; CHECK-LABEL: my_access_global_a:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0: ; %entry
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; CHECK-NEXT: move.l (a@GOTPCREL,%pc), %a0
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; CHECK-NEXT: move.l (%a0), %d0
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; CHECK-NEXT: rts
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entry:
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%0 = load i32, ptr @a, align 4
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ret i32 %0
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}
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; WeakAny Linkage
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@b = weak global i32 0, align 4
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define i32 @my_access_global_b() #0 {
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; CHECK-LABEL: my_access_global_b:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0: ; %entry
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; CHECK-NEXT: move.l (b@GOTPCREL,%pc), %a0
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; CHECK-NEXT: move.l (%a0), %d0
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; CHECK-NEXT: rts
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entry:
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%0 = load i32, ptr @b, align 4
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ret i32 %0
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}
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; Internal Linkage
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@c = internal global i32 0, align 4
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define i32 @my_access_global_c() #0 {
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; CHECK-LABEL: my_access_global_c:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0: ; %entry
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; CHECK-NEXT: lea (_GLOBAL_OFFSET_TABLE_@GOTPCREL,%pc), %a0
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; CHECK-NEXT: move.l #c@GOTOFF, %d0
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; CHECK-NEXT: move.l (0,%a0,%d0), %d0
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; CHECK-NEXT: rts
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entry:
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%0 = load i32, ptr @c, align 4
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ret i32 %0
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}
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; External Linkage, only declaration.
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@d = external global i32, align 4
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define i32 @my_access_global_load_d() #0 {
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; CHECK-LABEL: my_access_global_load_d:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0: ; %entry
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; CHECK-NEXT: move.l (d@GOTPCREL,%pc), %a0
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; CHECK-NEXT: move.l (%a0), %d0
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; CHECK-NEXT: rts
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entry:
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%0 = load i32, ptr @d, align 4
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ret i32 %0
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}
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; External Linkage, only declaration, store a value.
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define i32 @my_access_global_store_d() #0 {
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; CHECK-LABEL: my_access_global_store_d:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0: ; %entry
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; CHECK-NEXT: move.l (d@GOTPCREL,%pc), %a0
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; CHECK-NEXT: move.l #2, (%a0)
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; CHECK-NEXT: moveq #0, %d0
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; CHECK-NEXT: rts
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entry:
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store i32 2, ptr @d, align 4
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ret i32 0
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}
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; External Linkage, function pointer access.
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declare i32 @access_fp(ptr)
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declare i32 @foo()
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define i32 @my_access_fp_foo() #0 {
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; CHECK-LABEL: my_access_fp_foo:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0: ; %entry
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; CHECK-NEXT: suba.l #4, %sp
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; CHECK-NEXT: .cfi_def_cfa_offset -8
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; CHECK-NEXT: move.l (foo@GOTPCREL,%pc), (%sp)
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; CHECK-NEXT: jsr (access_fp@PLT,%pc)
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; CHECK-NEXT: adda.l #4, %sp
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; CHECK-NEXT: rts
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entry:
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%call = call i32 @access_fp(ptr @foo)
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ret i32 %call
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}
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; LinkOnceODR Linkage, function pointer access.
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$bar = comdat any
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define linkonce_odr i32 @bar() comdat {
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; CHECK-LABEL: bar:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0: ; %entry
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; CHECK-NEXT: moveq #0, %d0
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; CHECK-NEXT: rts
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entry:
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ret i32 0
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}
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define i32 @my_access_fp_bar() #0 {
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; CHECK-LABEL: my_access_fp_bar:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0: ; %entry
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; CHECK-NEXT: suba.l #4, %sp
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; CHECK-NEXT: .cfi_def_cfa_offset -8
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; CHECK-NEXT: move.l (bar@GOTPCREL,%pc), (%sp)
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; CHECK-NEXT: jsr (access_fp@PLT,%pc)
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; CHECK-NEXT: adda.l #4, %sp
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; CHECK-NEXT: rts
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entry:
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%call = call i32 @access_fp(ptr @bar)
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ret i32 %call
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}
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!llvm.module.flags = !{!0, !1}
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!0 = !{i32 1, !"PIC Level", i32 1}
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!1 = !{i32 1, !"PIE Level", i32 1}
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