Jessica Paquette 0e85d63486 [AArch64][GlobalISel] Allow vector load legalization into 128-bit-wide types ...

Similar to 3d25fdc5c2

This fixes bad codegen in cases like so:

https://godbolt.org/z/hePhz1

Differential Revision: https://reviews.llvm.org/D96296

2021-02-09 13:35:59 -08:00

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AArch64

[AArch64][GlobalISel] Allow vector load legalization into 128-bit-wide types

2021-02-09 13:35:59 -08:00

AMDGPU

AMDGPU: Fix verifier error with argument passed in CSR SGPR

2021-02-09 13:49:44 -05:00

ARC

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ARM

Revert "[Codegen][ReplaceWithVecLib] add pass to replace vector intrinsics with calls to vector library"

2021-02-05 15:10:11 -05:00

AVR

[AVR] Fix global references to function symbols

2021-02-10 00:40:49 +13:00

BPF

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Generic

Revert "[Codegen][ReplaceWithVecLib] add pass to replace vector intrinsics with calls to vector library"

2021-02-05 15:10:11 -05:00

Hexagon

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Inputs

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Lanai

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Mips

[DAGCombiner] Remove (sra (shl X, C), C) if X has more than C sign bits.

2021-02-03 10:18:40 -08:00

MIR

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MSP430

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NVPTX

[NVPTX][NewPM] Re-enable NVVMReflectPass

2021-02-08 13:58:17 -08:00

PowerPC

[DAGCombine] Do not remove masking argument to FP16_TO_FP for some targets

2021-02-09 06:33:48 -06:00

RISCV

[RISCV] Remove SRO* and SLO* instructions from bitmanip.

2021-02-09 09:35:05 -08:00

SPARC

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SystemZ

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Thumb

[RISCV][PrologEpilogInserter] "Float" emergency spill slots to avoid making them immediately unreachable from the stack pointer

2021-01-23 09:10:03 +00:00

Thumb2

[ARM] One-off identity shuffle

2021-02-08 21:24:32 +00:00

VE

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WebAssembly

[WebAssembly] Handle EH terminate pads for cleanup

2021-02-06 08:40:30 -08:00

WinCFGuard

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WinEH

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X86

[X86][SSE] foldShuffleOfHorizOp - add SHUFPS v4f32 handling

2021-02-09 14:18:45 +00:00

XCore

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