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[ARM] Add Cortex-A510 CPU for AArch32 (#118811)

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This core was originally AArch64-only, but the r1p0 revision added
optional support for AArch32 at EL0.

TRM: https://developer.arm.com/documentation/101604/0103
This commit is contained in:
Oliver Stannard
2024-12-06 09:51:22 +01:00
committed by GitHub
parent f893b47500
commit 2d8e8dd2b8
7 changed files with 41 additions and 1 deletions
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11
clang/test/Driver/arm-cortex-cpus-2.c
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@@ -544,6 +544,17 @@
// CHECK-CORTEX-A78AE-MFPU: "-target-feature" "+sha2"
// CHECK-CORTEX-A78AE-MFPU: "-target-feature" "+aes"
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a510 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A510 %s
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a510 -mfpu=crypto-neon-fp-armv8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A510-MFPU %s
// CHECK-CORTEX-A510: "-cc1"{{.*}} "-triple" "armv9a-{{.*}} "-target-cpu" "cortex-a510"
// CHECK-CORTEX-A510-NOT: "-target-feature" "{{[+-]}}sm4"
// CHECK-CORTEX-A510-NOT: "-target-feature" "{{[+-]}}sha3"
// CHECK-CORTEX-A510: "-target-feature" "-aes"
// CHECK-CORTEX-A510-SAME: {{$}}
// CHECK-CORTEX-A510-MFPU: "-cc1"{{.*}} "-target-feature" "+fp-armv8"
// CHECK-CORTEX-A510-MFPU: "-target-feature" "+sha2"
// CHECK-CORTEX-A510-MFPU: "-target-feature" "+aes"
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a710 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A710 %s
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a710 -mfpu=crypto-neon-fp-armv8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A710-MFPU %s
// CHECK-CORTEX-A710: "-cc1"{{.*}} "-triple" "armv9a-{{.*}} "-target-cpu" "cortex-a710"

1
clang/test/Misc/target-invalid-cpu-note/arm.c
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@@ -84,6 +84,7 @@
// CHECK-SAME: {{^}}, cortex-a78
// CHECK-SAME: {{^}}, cortex-a78ae
// CHECK-SAME: {{^}}, cortex-a78c
// CHECK-SAME: {{^}}, cortex-a510
// CHECK-SAME: {{^}}, cortex-a710
// CHECK-SAME: {{^}}, cortex-x1
// CHECK-SAME: {{^}}, cortex-x1c

3
llvm/include/llvm/TargetParser/ARMTargetParser.def
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@@ -374,6 +374,9 @@ ARM_CPU_NAME("cortex-a78ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_RAS | ARM::AEK_DOTPROD))
ARM_CPU_NAME("cortex-a78c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
ARM::AEK_FP16 | ARM::AEK_DOTPROD)
ARM_CPU_NAME("cortex-a510", ARMV9A, FK_NEON_FP_ARMV8, false,
(ARM::AEK_DOTPROD | ARM::AEK_FP16FML | ARM::AEK_BF16 |
ARM::AEK_SB | ARM::AEK_I8MM))
ARM_CPU_NAME("cortex-a710", ARMV9A, FK_NEON_FP_ARMV8, false,
(ARM::AEK_DOTPROD | ARM::AEK_FP16FML | ARM::AEK_BF16 |
ARM::AEK_SB | ARM::AEK_I8MM))

10
llvm/lib/Target/ARM/ARMProcessors.td
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@@ -45,6 +45,8 @@ def ProcA78AE : SubtargetFeature<"cortex-a78ae", "ARMProcFamily", "CortexA78AE
"Cortex-A78AE ARM processors", []>;
def ProcA78C : SubtargetFeature<"a78c", "ARMProcFamily", "CortexA78C",
"Cortex-A78C ARM processors", []>;
def ProcA510 : SubtargetFeature<"cortex-a510", "ARMProcFamily",
"CortexA510", "Cortex-A510 ARM processors", []>;
def ProcA710 : SubtargetFeature<"cortex-a710", "ARMProcFamily",
"CortexA710", "Cortex-A710 ARM processors", []>;
def ProcX1 : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
@@ -518,6 +520,14 @@ def : ProcNoItin<"cortex-a78c", [ARMv82a, ProcA78C,
FeatureDotProd,
FeatureFullFP16]>;
def : ProcNoItin<"cortex-a510", [ARMv9a, ProcA710,
FeatureHWDivThumb,
FeatureHWDivARM,
FeatureFP16FML,
FeatureBF16,
FeatureMatMulInt8,
FeatureSB]>;
def : ProcNoItin<"cortex-a710", [ARMv9a, ProcA710,
FeatureHWDivThumb,
FeatureHWDivARM,

1
llvm/lib/Target/ARM/ARMSubtarget.cpp
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@@ -287,6 +287,7 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
case CortexA78:
case CortexA78AE:
case CortexA78C:
case CortexA510:
case CortexA710:
case CortexR4:
case CortexR5:

6
llvm/test/CodeGen/ARM/build-attributes.ll
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@@ -187,6 +187,12 @@
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; ARMv9a (AArch32)
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a510 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a510 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a710 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a710 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; ARMv7a
; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN

10
llvm/unittests/TargetParser/TargetParserTest.cpp
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@@ -404,6 +404,14 @@ INSTANTIATE_TEST_SUITE_P(
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC |
ARM::AEK_RAS | ARM::AEK_FP16 | ARM::AEK_DOTPROD,
"8.2-A"),
ARMCPUTestParams<uint64_t>("cortex-a510", "armv9-a", "neon-fp-armv8",
ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
ARM::AEK_DSP | ARM::AEK_CRC |
ARM::AEK_RAS | ARM::AEK_DOTPROD |
ARM::AEK_FP16FML | ARM::AEK_BF16 |
ARM::AEK_I8MM | ARM::AEK_SB,
"9-A"),
ARMCPUTestParams<uint64_t>("cortex-a710", "armv9-a", "neon-fp-armv8",
ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
@@ -521,7 +529,7 @@ INSTANTIATE_TEST_SUITE_P(
"7-S")),
ARMCPUTestParams<uint64_t>::PrintToStringParamName);
static constexpr unsigned NumARMCPUArchs = 93;
static constexpr unsigned NumARMCPUArchs = 94;
TEST(TargetParserTest, testARMCPUArchList) {
SmallVector<StringRef, NumARMCPUArchs> List;