[Target] Use range-based for loops (NFC) (#146277)

This commit is contained in:
Kazu Hirata
2025-06-29 19:19:47 -07:00
committed by GitHub
parent 72c0fc2305
commit 42d94afffe
4 changed files with 16 additions and 24 deletions

View File

@@ -712,9 +712,8 @@ SDValue LanaiTargetLowering::LowerCCCCallTo(
// Build a sequence of copy-to-reg nodes chained together with token chain and
// flag operands which copy the outgoing args into registers. The InGlue in
// necessary since all emitted instructions must be stuck together.
for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) {
Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first,
RegsToPass[I].second, InGlue);
for (const auto [Reg, N] : RegsToPass) {
Chain = DAG.getCopyToReg(Chain, DL, Reg, N, InGlue);
InGlue = Chain.getValue(1);
}
@@ -745,9 +744,8 @@ SDValue LanaiTargetLowering::LowerCCCCallTo(
// Add argument registers to the end of the list so that they are
// known live into the call.
for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I)
Ops.push_back(DAG.getRegister(RegsToPass[I].first,
RegsToPass[I].second.getValueType()));
for (const auto [Reg, N] : RegsToPass)
Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
if (InGlue.getNode())
Ops.push_back(InGlue);

View File

@@ -768,9 +768,8 @@ SDValue MSP430TargetLowering::LowerCCCCallTo(
// flag operands which copy the outgoing args into registers. The InGlue in
// necessary since all emitted instructions must be stuck together.
SDValue InGlue;
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
RegsToPass[i].second, InGlue);
for (const auto [Reg, N] : RegsToPass) {
Chain = DAG.getCopyToReg(Chain, dl, Reg, N, InGlue);
InGlue = Chain.getValue(1);
}
@@ -790,9 +789,8 @@ SDValue MSP430TargetLowering::LowerCCCCallTo(
// Add argument registers to the end of the list so that they are
// known live into the call.
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
Ops.push_back(DAG.getRegister(RegsToPass[i].first,
RegsToPass[i].second.getValueType()));
for (const auto [Reg, N] : RegsToPass)
Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
if (InGlue.getNode())
Ops.push_back(InGlue);

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@@ -738,18 +738,16 @@ SDValue VETargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
// necessary since all emitted instructions must be stuck together in order
// to pass the live physical registers.
SDValue InGlue;
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first,
RegsToPass[i].second, InGlue);
for (const auto [Reg, N] : RegsToPass) {
Chain = DAG.getCopyToReg(Chain, DL, Reg, N, InGlue);
InGlue = Chain.getValue(1);
}
// Build the operands for the call instruction itself.
SmallVector<SDValue, 8> Ops;
Ops.push_back(Chain);
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
Ops.push_back(DAG.getRegister(RegsToPass[i].first,
RegsToPass[i].second.getValueType()));
for (const auto [Reg, N] : RegsToPass)
Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
// Add a register mask operand representing the call-preserved registers.
const VERegisterInfo *TRI = Subtarget->getRegisterInfo();

View File

@@ -1064,9 +1064,8 @@ SDValue XCoreTargetLowering::LowerCCCCallTo(
// The InGlue in necessary since all emitted instructions must be
// stuck together.
SDValue InGlue;
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
RegsToPass[i].second, InGlue);
for (const auto [Reg, N] : RegsToPass) {
Chain = DAG.getCopyToReg(Chain, dl, Reg, N, InGlue);
InGlue = Chain.getValue(1);
}
@@ -1089,9 +1088,8 @@ SDValue XCoreTargetLowering::LowerCCCCallTo(
// Add argument registers to the end of the list so that they are
// known live into the call.
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
Ops.push_back(DAG.getRegister(RegsToPass[i].first,
RegsToPass[i].second.getValueType()));
for (const auto [Reg, N] : RegsToPass)
Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
if (InGlue.getNode())
Ops.push_back(InGlue);