[NFC][AMDGPU] Fix stale links to ROCm repositories (#143949)
Following GitHub organizations were merged into the ROCm org: * ROCm-Developer-Tools * RadeonOpenCompute * ROCmSoftwarePlatform Ensure that all hyperlinks to the old organizations now point to the new organization at https://github.com/ROCm.
This commit is contained in:
Saiyedul Islam
@@ -17,7 +17,7 @@
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HIP Support
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=============
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HIP (Heterogeneous-Compute Interface for Portability) `<https://github.com/ROCm-Developer-Tools/HIP>`_ is
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HIP (Heterogeneous-Compute Interface for Portability) `<https://github.com/ROCm/HIP>`_ is
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a C++ Runtime API and Kernel Language. It enables developers to create portable applications for
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offloading computation to different hardware platforms from a single source code.
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@@ -41,9 +41,9 @@ backend or the out-of-tree LLVM-SPIRV translator. The SPIR-V is then bundled and
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.. note::
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While Clang does not directly provide HIP support for NVIDIA GPUs and CPUs, these platforms are supported via other means:
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- NVIDIA GPUs: HIP support is offered through the HIP project `<https://github.com/ROCm-Developer-Tools/HIP>`_, which provides a header-only library for translating HIP runtime APIs into CUDA runtime APIs. The code is subsequently compiled using NVIDIA's `nvcc`.
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- NVIDIA GPUs: HIP support is offered through the HIP project `<https://github.com/ROCm/HIP>`_, which provides a header-only library for translating HIP runtime APIs into CUDA runtime APIs. The code is subsequently compiled using NVIDIA's `nvcc`.
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- CPUs: HIP support is available through the HIP-CPU runtime library `<https://github.com/ROCm-Developer-Tools/HIP-CPU>`_. This header-only library enables CPUs to execute unmodified HIP code.
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- CPUs: HIP support is available through the HIP-CPU runtime library `<https://github.com/ROCm/HIP-CPU>`_. This header-only library enables CPUs to execute unmodified HIP code.
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Example Usage
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@@ -328,7 +328,7 @@ The `parallel_unsequenced_policy <https://en.cppreference.com/w/cpp/algorithm/ex
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maps relatively well to the execution model of AMD GPUs. This, coupled with the
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the availability and maturity of GPU accelerated algorithm libraries that
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implement most / all corresponding algorithms in the standard library
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(e.g. `rocThrust <https://github.com/ROCmSoftwarePlatform/rocThrust>`__), makes
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(e.g. `rocThrust <https://github.com/ROCm/rocm-libraries/tree/develop/projects/rocthrust>`__), makes
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it feasible to provide seamless accelerator offload for supported algorithms,
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when an accelerated version exists. Thus, it becomes possible to easily access
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the computational resources of an AMD accelerator, via a well specified,
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@@ -483,7 +483,7 @@ such as GPUs, work.
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allocation / deallocation functions with accelerator-aware equivalents,
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based on a pre-established table; the list of functions that can be
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interposed is available
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`here <https://github.com/ROCmSoftwarePlatform/roc-stdpar#allocation--deallocation-interposition-status>`__;
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`here <https://github.com/ROCm/roc-stdpar#allocation--deallocation-interposition-status>`__;
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- This is only run when compiling for the host.
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The second pass is optional.
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@@ -627,7 +627,7 @@ Linux operating system. Support is synthesised in the following table:
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The minimum Linux kernel version for running in HMM mode is 6.4.
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The forwarding header can be obtained from
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`its GitHub repository <https://github.com/ROCmSoftwarePlatform/roc-stdpar>`_.
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`its GitHub repository <https://github.com/ROCm/roc-stdpar>`_.
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It will be packaged with a future `ROCm <https://rocm.docs.amd.com/en/latest/>`_
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release. Because accelerated algorithms are provided via
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`rocThrust <https://rocm.docs.amd.com/projects/rocThrust/en/latest/>`_, a
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@@ -636,7 +636,7 @@ transitive dependency on
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can be obtained either by installing their associated components of the
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`ROCm <https://rocm.docs.amd.com/en/latest/>`_ stack, or from their respective
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repositories. The list algorithms that can be offloaded is available
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`here <https://github.com/ROCmSoftwarePlatform/roc-stdpar#algorithm-support-status>`_.
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`here <https://github.com/ROCm/roc-stdpar#algorithm-support-status>`_.
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HIP Specific Elements
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---------------------
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@@ -5323,7 +5323,7 @@ D. References
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.. _amdgpu-dwarf-AMD-ROCgdb:
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2. [AMD-ROCgdb] `AMD ROCm Debugger (ROCgdb) <https://github.com/ROCm-Developer-Tools/ROCgdb>`__
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2. [AMD-ROCgdb] `AMD ROCm Debugger (ROCgdb) <https://github.com/ROCm/ROCgdb>`__
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.. _amdgpu-dwarf-AMD-ROCm:
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@@ -18435,8 +18435,8 @@ Additional Documentation
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.. [AMD-RADEON-HD-5000] `AMD Evergreen shader ISA <http://developer.amd.com/wordpress/media/2012/10/AMD_Evergreen-Family_Instruction_Set_Architecture.pdf>`__
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.. [AMD-RADEON-HD-6000] `AMD Cayman/Trinity shader ISA <http://developer.amd.com/wordpress/media/2012/10/AMD_HD_6900_Series_Instruction_Set_Architecture.pdf>`__
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.. [AMD-ROCm] `AMD ROCm™ Platform <https://rocmdocs.amd.com/>`__
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.. [AMD-ROCm-github] `AMD ROCm™ github <http://github.com/RadeonOpenCompute>`__
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.. [AMD-ROCm-Release-Notes] `AMD ROCm Release Notes <https://github.com/RadeonOpenCompute/ROCm>`__
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.. [AMD-ROCm-github] `AMD ROCm™ github <http://github.com/ROCm>`__
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.. [AMD-ROCm-Release-Notes] `AMD ROCm Release Notes <https://github.com/ROCm/ROCm>`__
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.. [CLANG-ATTR] `Attributes in Clang <https://clang.llvm.org/docs/AttributeReference.html>`__
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.. [DWARF] `DWARF Debugging Information Format <http://dwarfstd.org/>`__
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.. [ELF] `Executable and Linkable Format (ELF) <http://www.sco.com/developers/gabi/>`__
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@@ -182,7 +182,7 @@ attributes #5 = { nounwind }
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!10 = !{i32 7, !"frame-pointer", i32 2}
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!11 = !{i32 4, !"amdgpu_hostcall", i32 1}
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!12 = !{!"clang version 20.0.0git (/tmp/llvm/clang b9447c03a9ef2eed55b685a33511df86f7f94e89)"}
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!13 = !{!"AMD clang version 17.0.0 (https://github.com/RadeonOpenCompute/llvm-project roc-6.0.2 24012 af27734ed982b52a9f1be0f035ac91726fc697e4)"}
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!13 = !{!"AMD clang version 17.0.0 (https://github.com/ROCm/llvm-project roc-6.0.2 24012 af27734ed982b52a9f1be0f035ac91726fc697e4)"}
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!14 = !{i32 2, i32 0}
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!15 = distinct !DISubprogram(name: "__omp_offloading_fd02_727e9_h_l12_debug__", scope: !16, file: !16, line: 13, type: !17, scopeLine: 13, flags: DIFlagArtificial | DIFlagPrototyped, spFlags: DISPFlagLocalToUnit | DISPFlagDefinition, unit: !0, retainedNodes: !22)
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!16 = !DIFile(filename: "test.c", directory: "/tmp")
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@@ -13,8 +13,8 @@
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// pointed to here. However the following links contain more information about
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// ROCDL (ROCm-Device-Library)
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//
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// https://github.com/RadeonOpenCompute/ROCm-Device-Libs/blob/amd-stg-open/doc/OCML.md
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// https://github.com/RadeonOpenCompute/ROCm-Device-Libs/blob/amd-stg-open/doc/OCKL.md
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// https://github.com/ROCm/llvm-project/blob/amd-staging/amd/device-libs/doc/OCML.md
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// https://github.com/ROCm/llvm-project/blob/amd-staging/amd/device-libs/doc/OCKL.md
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// https://llvm.org/docs/AMDGPUUsage.html
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//
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//===----------------------------------------------------------------------===//
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