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[AArch64AsmParser] Support (xxx), lsl 16 after #80571

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An immediate integer operand not prefixed with # can also be followed
by "lsl". Parse "lsl".
In the wild, edk2 ArmPkg/Include/AsmMacroIoLibV8.h has
`movz      Reg, (Val) >> 16, lsl #16`.

Note: our support for paren expression not prefixed with # is not very
good. For example, `adds x3, x4, (1024>>0), lsl 12` fails to be parsed.
This commit is contained in:
Fangrui Song
2024-02-19 00:57:48 -08:00
parent e98abc3ea0
commit 442f066fc4
2 changed files with 15 additions and 9 deletions
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20
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
View File

@@ -4764,6 +4764,15 @@ bool AArch64AsmParser::parseOperand(OperandVector &Operands, bool isCondCode,
// Nothing custom, so do general case parsing.
SMLoc S, E;
auto parseOptionalShiftExtend = [&](AsmToken SavedTok) {
if (parseOptionalToken(AsmToken::Comma)) {
ParseStatus Res = tryParseOptionalShiftExtend(Operands);
if (!Res.isNoMatch())
return Res.isFailure();
getLexer().UnLex(SavedTok);
}
return false;
};
switch (getLexer().getKind()) {
default: {
SMLoc S = getLoc();
@@ -4773,7 +4782,7 @@ bool AArch64AsmParser::parseOperand(OperandVector &Operands, bool isCondCode,
SMLoc E = SMLoc::getFromPointer(getLoc().getPointer() - 1);
Operands.push_back(AArch64Operand::CreateImm(Expr, S, E, getContext()));
return false;
return parseOptionalShiftExtend(getTok());
}
case AsmToken::LBrac: {
Operands.push_back(
@@ -4895,14 +4904,7 @@ bool AArch64AsmParser::parseOperand(OperandVector &Operands, bool isCondCode,
Operands.push_back(AArch64Operand::CreateImm(ImmVal, S, E, getContext()));
// Parse an optional shift/extend modifier.
AsmToken SavedTok = Tok;
if (parseOptionalToken(AsmToken::Comma)) {
ParseStatus Res = tryParseOptionalShiftExtend(Operands);
if (!Res.isNoMatch())
return Res.isFailure();
getLexer().UnLex(SavedTok);
}
return false;
return parseOptionalShiftExtend(Tok);
}
case AsmToken::Equal: {
SMLoc Loc = getLoc();

4
llvm/test/MC/AArch64/arm64-optional-hash.s
View File

@@ -8,6 +8,10 @@
; CHECK: adds x3, x4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0xb1]
adds x3, x4, 1024, lsl 12
; CHECK-COUNT-2: mov x3, #327680 ; encoding: [0xa3,0x00,0xa0,0xd2]
movz x3, (0x54321) >> 16, lsl 16
movz x3, (0x54321 >> 16), lsl 16
; Optional extend
; CHECK: add sp, x2, x3 ; encoding: [0x5f,0x60,0x23,0x8b]
add sp, x2, x3, uxtx 0