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Add RISC-V support information to readme (#132699)

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AnastasiyaChernikova
2025-03-31 22:13:46 +03:00
committed by GitHub
parent 8e390dedd7
commit 5a3079421b
2 changed files with 8 additions and 4 deletions
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9
llvm/docs/CommandGuide/llvm-exegesis.rst
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@@ -34,10 +34,11 @@ SUPPORTED PLATFORMS
-------------------
:program:`llvm-exegesis` currently only supports X86 (64-bit only), ARM
(AArch64 only, snippet generation is sparse), MIPS, and PowerPC (PowerPC64LE
only) on Linux for benchmarking. Not all benchmarking functionality is
guaranteed to work on every platform. :program:`llvm-exegesis` also has a
separate analysis mode that is supported on every platform that LLVM is.
(AArch64 only, snippet generation is sparse), MIPS, PowerPC (PowerPC64LE
only) and RISC-V (RV64I/E and RV32I/E) on Linux for benchmarking. Not all
benchmarking functionality is guaranteed to work on every platform.
:program:`llvm-exegesis` also has a separate analysis mode that is supported on
every platform that LLVM is.
To enable benchmarking in llvm-exegesis, LLVM must be configured and built with
`LLVM_ENABLE_LIBPFM` enabled, as :program:`llvm-exegesis` depends on libpfm4

3
llvm/tools/llvm-exegesis/README.md
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@@ -32,6 +32,9 @@ architectures:
e.g. pseudo instructions and most register classes are not supported.
* MIPS
* PowerPC (PowerPC64LE only)
* RISC-V
* RV64I/E, RV32I/E and extensions supported by LLVM's RISC-V backend with
some limitations.
Note that not all benchmarking functionality is guaranteed to work on all platforms.