[AArch64] Add Cortex-A320 scheduling model (#144385)
Instead of using the Cortex-A510 scheduling model, Cortex-A320 now uses its own scheduling model, based off of the Cortex-A320 Software Optimization Guide: https://developer.arm.com/documentation/110285/r0p1 --------- Co-authored-by: Nashe Mncube <Nashe.Mncube@arm.com>
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@@ -103,6 +103,7 @@ def MTEUnsupported : AArch64Unsupported {
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let F = [HasPAuth, HasPAuthLR] in
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def PAUnsupported : AArch64Unsupported;
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include "AArch64SchedA320.td"
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include "AArch64SchedA53.td"
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include "AArch64SchedA55.td"
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include "AArch64SchedA510.td"
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@@ -1131,7 +1131,7 @@ def : ProcessorModel<"cortex-a34", CortexA53Model, ProcessorFeatures.A53,
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[TuneA35]>;
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def : ProcessorModel<"cortex-a35", CortexA53Model, ProcessorFeatures.A53,
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[TuneA35]>;
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def : ProcessorModel<"cortex-a320", CortexA510Model, ProcessorFeatures.A320,
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def : ProcessorModel<"cortex-a320", CortexA320Model, ProcessorFeatures.A320,
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[TuneA320]>;
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def : ProcessorModel<"cortex-a53", CortexA53Model, ProcessorFeatures.A53,
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[TuneA53]>;
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llvm/lib/Target/AArch64/AArch64SchedA320.td
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llvm/lib/Target/AArch64/AArch64SchedA320.td
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llvm/test/tools/llvm-mca/AArch64/Cortex/A320-basic-instructions.s
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llvm/test/tools/llvm-mca/AArch64/Cortex/A320-basic-instructions.s
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llvm/test/tools/llvm-mca/AArch64/Cortex/A320-neon-instructions.s
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llvm/test/tools/llvm-mca/AArch64/Cortex/A320-neon-instructions.s
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llvm/test/tools/llvm-mca/AArch64/Cortex/A320-sve-instructions.s
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llvm/test/tools/llvm-mca/AArch64/Cortex/A320-sve-instructions.s
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