[X86] Add diagnostic for fp128 inline assemble for 32-bit (#146458)

Suggested by Craig from #146259

llvm/lib/Target/X86/X86ISelLowering.cpp

@@ -61737,6 +61737,9 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
           return std::make_pair(0U, &X86::VR128XRegClass);
         return std::make_pair(0U, &X86::VR128RegClass);
       case MVT::f128:
+        if (!Subtarget.is64Bit())
+          break;
+        [[fallthrough]];
       case MVT::v16i8:
       case MVT::v8i16:
       case MVT::v4i32:

llvm/test/CodeGen/X86/pr43157.ll

@@ -1,6 +1,7 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: not llc < %s -mtriple=i686-pc-linux -o - -mattr=+sse2 2>&1 | FileCheck %s --check-prefix=ERR
 ; RUN: llc < %s -mtriple=x86_64-pc-linux -o - -mattr=+mmx | FileCheck %s
 
+; ERR: error: couldn't allocate input reg for constraint 'x'
 define void @foo(fp128 %x) {
 ; CHECK-LABEL: foo:
 ; CHECK:       # %bb.0: # %entry