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[Sparc] Use helper class for emitting CFI instructions into MIR (#136027)

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Also, guard emission by `needsFrameMoves()` check. There are no changes
in tests because cfi instructions are currently ignored by AsmPrinter
when they don't need to be printed/encoded.

PR: https://github.com/llvm/llvm-project/pull/136027
This commit is contained in:
Sergei Barannikov
2025-04-17 03:53:08 +03:00
committed by GitHub
parent 18855ece3c
commit 78671dbb26
2 changed files with 11 additions and 27 deletions
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4
llvm/include/llvm/CodeGen/CFIInstBuilder.h
View File

@@ -82,6 +82,10 @@ public:
TRI.getDwarfRegNum(Reg2, IsEH)));
}
void buildWindowSave() const {
insertCFIInst(MCCFIInstruction::createWindowSave(nullptr));
}
void buildRestore(MCRegister Reg) const {
insertCFIInst(MCCFIInstruction::createRestore(
nullptr, TRI.getDwarfRegNum(Reg, IsEH)));

34
llvm/lib/Target/Sparc/SparcFrameLowering.cpp
View File

@@ -14,6 +14,7 @@
#include "SparcInstrInfo.h"
#include "SparcMachineFunctionInfo.h"
#include "SparcSubtarget.h"
#include "llvm/CodeGen/CFIInstBuilder.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
@@ -88,14 +89,7 @@ void SparcFrameLowering::emitPrologue(MachineFunction &MF,
assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
MachineFrameInfo &MFI = MF.getFrameInfo();
const SparcSubtarget &Subtarget = MF.getSubtarget<SparcSubtarget>();
const SparcInstrInfo &TII =
*static_cast<const SparcInstrInfo *>(Subtarget.getInstrInfo());
const SparcRegisterInfo &RegInfo =
*static_cast<const SparcRegisterInfo *>(Subtarget.getRegisterInfo());
MachineBasicBlock::iterator MBBI = MBB.begin();
// Debug location must be unknown since the first debug location is used
// to determine the end of the prologue.
DebugLoc dl;
// Get the number of bytes to allocate from the FrameInfo
int NumBytes = (int) MFI.getStackSize();
@@ -141,26 +135,12 @@ void SparcFrameLowering::emitPrologue(MachineFunction &MF,
emitSPAdjustment(MF, MBB, MBBI, -NumBytes, SAVErr, SAVEri);
unsigned regFP = RegInfo.getDwarfRegNum(SP::I6, true);
// Emit ".cfi_def_cfa_register 30".
unsigned CFIIndex =
MF.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, regFP));
BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
.addCFIIndex(CFIIndex);
// Emit ".cfi_window_save".
CFIIndex = MF.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
.addCFIIndex(CFIIndex);
unsigned regInRA = RegInfo.getDwarfRegNum(SP::I7, true);
unsigned regOutRA = RegInfo.getDwarfRegNum(SP::O7, true);
// Emit ".cfi_register 15, 31".
CFIIndex = MF.addFrameInst(
MCCFIInstruction::createRegister(nullptr, regOutRA, regInRA));
BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
.addCFIIndex(CFIIndex);
if (MF.needsFrameMoves()) {
CFIInstBuilder CFIBuilder(MBB, MBBI, MachineInstr::NoFlags);
CFIBuilder.buildDefCFARegister(SP::I6);
CFIBuilder.buildWindowSave();
CFIBuilder.buildRegister(SP::O7, SP::I7);
}
}
MachineBasicBlock::iterator SparcFrameLowering::