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[RISCV] Add tests for (load (add X, [2048,4094])). NFC

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Offsets in the range [-4095,-2049] or [2048, 4094] are split into
two ADDIs. One of the ADDIs will be folded into the load/store
immediate through an post-isel peephole.
This commit is contained in:
Craig Topper
2022-06-27 11:02:37 -07:00
parent 20dd3297b1
commit 9afa5b8da2
2 changed files with 70 additions and 0 deletions
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35
llvm/test/CodeGen/RISCV/mem.ll
View File

@@ -199,6 +199,41 @@ define dso_local i32 @lw_sw_constant(i32 %a) nounwind {
ret i32 %2
}
define i32 @lw_near_local(i32* %a) {
; RV32I-LABEL: lw_near_local:
; RV32I: # %bb.0:
; RV32I-NEXT: addi a0, a0, 2047
; RV32I-NEXT: lw a0, 5(a0)
; RV32I-NEXT: ret
%1 = getelementptr inbounds i32, i32* %a, i64 513
%2 = load volatile i32, i32* %1
ret i32 %2
}
define void @st_near_local(i32* %a, i32 %b) {
; RV32I-LABEL: st_near_local:
; RV32I: # %bb.0:
; RV32I-NEXT: addi a0, a0, 2047
; RV32I-NEXT: sw a1, 5(a0)
; RV32I-NEXT: ret
%1 = getelementptr inbounds i32, i32* %a, i64 513
store i32 %b, i32* %1
ret void
}
define i32 @lw_sw_near_local(i32* %a, i32 %b) {
; RV32I-LABEL: lw_sw_near_local:
; RV32I: # %bb.0:
; RV32I-NEXT: addi a2, a0, 2047
; RV32I-NEXT: lw a0, 5(a2)
; RV32I-NEXT: sw a1, 5(a2)
; RV32I-NEXT: ret
%1 = getelementptr inbounds i32, i32* %a, i64 513
%2 = load volatile i32, i32* %1
store i32 %b, i32* %1
ret i32 %2
}
define i32 @lw_far_local(i32* %a) {
; RV32I-LABEL: lw_far_local:
; RV32I: # %bb.0:

35
llvm/test/CodeGen/RISCV/mem64.ll
View File

@@ -229,6 +229,41 @@ define dso_local i64 @ld_sd_global(i64 %a) nounwind {
ret i64 %1
}
define i64 @lw_near_local(i64* %a) {
; RV64I-LABEL: lw_near_local:
; RV64I: # %bb.0:
; RV64I-NEXT: addi a0, a0, 2047
; RV64I-NEXT: ld a0, 9(a0)
; RV64I-NEXT: ret
%1 = getelementptr inbounds i64, i64* %a, i64 257
%2 = load volatile i64, i64* %1
ret i64 %2
}
define void @st_near_local(i64* %a, i64 %b) {
; RV64I-LABEL: st_near_local:
; RV64I: # %bb.0:
; RV64I-NEXT: addi a0, a0, 2047
; RV64I-NEXT: sd a1, 9(a0)
; RV64I-NEXT: ret
%1 = getelementptr inbounds i64, i64* %a, i64 257
store i64 %b, i64* %1
ret void
}
define i64 @lw_sw_near_local(i64* %a, i64 %b) {
; RV64I-LABEL: lw_sw_near_local:
; RV64I: # %bb.0:
; RV64I-NEXT: addi a2, a0, 2047
; RV64I-NEXT: ld a0, 9(a2)
; RV64I-NEXT: sd a1, 9(a2)
; RV64I-NEXT: ret
%1 = getelementptr inbounds i64, i64* %a, i64 257
%2 = load volatile i64, i64* %1
store i64 %b, i64* %1
ret i64 %2
}
define i64 @lw_far_local(i64* %a) {
; RV64I-LABEL: lw_far_local:
; RV64I: # %bb.0: