[Target] Use range-based for loops (NFC) (#146253)
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@@ -1044,11 +1044,9 @@ SparcTargetLowering::LowerCall_32(TargetLowering::CallLoweringInfo &CLI,
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// The InGlue in necessary since all emitted instructions must be
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// stuck together.
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SDValue InGlue;
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for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
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Register Reg = RegsToPass[i].first;
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if (!isTailCall)
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Reg = toCallerWindow(Reg);
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Chain = DAG.getCopyToReg(Chain, dl, Reg, RegsToPass[i].second, InGlue);
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for (const auto [OrigReg, N] : RegsToPass) {
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Register Reg = isTailCall ? OrigReg : toCallerWindow(OrigReg);
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Chain = DAG.getCopyToReg(Chain, dl, Reg, N, InGlue);
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InGlue = Chain.getValue(1);
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}
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@@ -1069,11 +1067,9 @@ SparcTargetLowering::LowerCall_32(TargetLowering::CallLoweringInfo &CLI,
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Ops.push_back(Callee);
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if (hasStructRetAttr)
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Ops.push_back(DAG.getTargetConstant(SRetArgSize, dl, MVT::i32));
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for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
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Register Reg = RegsToPass[i].first;
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if (!isTailCall)
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Reg = toCallerWindow(Reg);
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Ops.push_back(DAG.getRegister(Reg, RegsToPass[i].second.getValueType()));
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for (const auto [OrigReg, N] : RegsToPass) {
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Register Reg = isTailCall ? OrigReg : toCallerWindow(OrigReg);
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Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
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}
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// Add a register mask operand representing the call-preserved registers.
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@@ -1375,9 +1371,8 @@ SparcTargetLowering::LowerCall_64(TargetLowering::CallLoweringInfo &CLI,
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// necessary since all emitted instructions must be stuck together in order
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// to pass the live physical registers.
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SDValue InGlue;
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for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
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Chain = DAG.getCopyToReg(Chain, DL,
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RegsToPass[i].first, RegsToPass[i].second, InGlue);
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for (const auto [Reg, N] : RegsToPass) {
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Chain = DAG.getCopyToReg(Chain, DL, Reg, N, InGlue);
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InGlue = Chain.getValue(1);
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}
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@@ -1395,9 +1390,8 @@ SparcTargetLowering::LowerCall_64(TargetLowering::CallLoweringInfo &CLI,
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SmallVector<SDValue, 8> Ops;
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Ops.push_back(Chain);
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Ops.push_back(Callee);
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for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
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Ops.push_back(DAG.getRegister(RegsToPass[i].first,
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RegsToPass[i].second.getValueType()));
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for (const auto [Reg, N] : RegsToPass)
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Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
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// Add a register mask operand representing the call-preserved registers.
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const SparcRegisterInfo *TRI = Subtarget->getRegisterInfo();
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@@ -2387,9 +2387,8 @@ SystemZTargetLowering::LowerCall(CallLoweringInfo &CLI,
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}
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// Build a sequence of copy-to-reg nodes, chained and glued together.
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for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) {
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Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first,
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RegsToPass[I].second, Glue);
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for (const auto [Reg, N] : RegsToPass) {
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Chain = DAG.getCopyToReg(Chain, DL, Reg, N, Glue);
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Glue = Chain.getValue(1);
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}
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@@ -2400,9 +2399,8 @@ SystemZTargetLowering::LowerCall(CallLoweringInfo &CLI,
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// Add argument registers to the end of the list so that they are
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// known live into the call.
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for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I)
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Ops.push_back(DAG.getRegister(RegsToPass[I].first,
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RegsToPass[I].second.getValueType()));
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for (const auto [Reg, N] : RegsToPass)
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Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
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// Add a register mask operand representing the call-preserved registers.
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const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
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