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[CostModel] Make Op0 and Op1 const in getVectorInstrCost. NFC (#137631)

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This does not alter much at the moment, but allows const pointers to be
passed as Op0 and Op1, simplifying later patches
This commit is contained in:
David Green
2025-05-01 15:55:08 +01:00
committed by GitHub
parent 47681736cb
commit abd2c07e39
24 changed files with 53 additions and 47 deletions
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5
llvm/include/llvm/Analysis/TargetTransformInfo.h
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@@ -1455,8 +1455,9 @@ public:
/// vectorizer passes.
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index = -1, Value *Op0 = nullptr,
Value *Op1 = nullptr) const;
unsigned Index = -1,
const Value *Op0 = nullptr,
const Value *Op1 = nullptr) const;
/// \return The expected cost of vector Insert and Extract.
/// Use -1 to indicate that there is no information on the index value.

4
llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
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@@ -781,8 +781,8 @@ public:
virtual InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const {
unsigned Index, const Value *Op0,
const Value *Op1) const {
return 1;
}

4
llvm/include/llvm/CodeGen/BasicTTIImpl.h
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@@ -1410,8 +1410,8 @@ public:
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const override {
unsigned Index, const Value *Op0,
const Value *Op1) const override {
return getRegUsageForType(Val->getScalarType());
}

2
llvm/lib/Analysis/TargetTransformInfo.cpp
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@@ -1085,7 +1085,7 @@ InstructionCost TargetTransformInfo::getCmpSelInstrCost(
InstructionCost TargetTransformInfo::getVectorInstrCost(
unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
Value *Op0, Value *Op1) const {
const Value *Op0, const Value *Op1) const {
assert((Opcode == Instruction::InsertElement ||
Opcode == Instruction::ExtractElement) &&
"Expecting Opcode to be insertelement/extractelement.");

5
llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
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@@ -3857,8 +3857,9 @@ InstructionCost AArch64TTIImpl::getVectorInstrCostHelper(
InstructionCost AArch64TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const {
unsigned Index,
const Value *Op0,
const Value *Op1) const {
bool HasRealUse =
Opcode == Instruction::InsertElement && Op0 && !isa<UndefValue>(Op0);
return getVectorInstrCostHelper(Opcode, Val, CostKind, Index, HasRealUse);

4
llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
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@@ -205,8 +205,8 @@ public:
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const override;
unsigned Index, const Value *Op0,
const Value *Op1) const override;
/// \param ScalarUserAndIdx encodes the information about extracts from a
/// vector with 'Scalar' being the value being extracted,'User' being the user

4
llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
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@@ -834,8 +834,8 @@ GCNTTIImpl::getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty,
InstructionCost GCNTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const {
unsigned Index, const Value *Op0,
const Value *Op1) const {
switch (Opcode) {
case Instruction::ExtractElement:
case Instruction::InsertElement: {

4
llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
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@@ -170,8 +170,8 @@ public:
using BaseT::getVectorInstrCost;
InstructionCost getVectorInstrCost(unsigned Opcode, Type *ValTy,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const override;
unsigned Index, const Value *Op0,
const Value *Op1) const override;
bool isReadRegisterSourceOfDivergence(const IntrinsicInst *ReadReg) const;
bool isSourceOfDivergence(const Value *V) const override;

5
llvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp
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@@ -110,8 +110,9 @@ InstructionCost R600TTIImpl::getCFInstrCost(unsigned Opcode,
InstructionCost R600TTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const {
unsigned Index,
const Value *Op0,
const Value *Op1) const {
switch (Opcode) {
case Instruction::ExtractElement:
case Instruction::InsertElement: {

4
llvm/lib/Target/AMDGPU/R600TargetTransformInfo.h
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@@ -64,8 +64,8 @@ public:
using BaseT::getVectorInstrCost;
InstructionCost getVectorInstrCost(unsigned Opcode, Type *ValTy,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const override;
unsigned Index, const Value *Op0,
const Value *Op1) const override;
};
} // end namespace llvm

4
llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
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@@ -901,8 +901,8 @@ InstructionCost ARMTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
InstructionCost ARMTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const {
unsigned Index, const Value *Op0,
const Value *Op1) const {
// Penalize inserting into an D-subregister. We end up with a three times
// lower estimated throughput on swift.
if (ST->hasSlowLoadDSubregister() && Opcode == Instruction::InsertElement &&

4
llvm/lib/Target/ARM/ARMTargetTransformInfo.h
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@@ -255,8 +255,8 @@ public:
using BaseT::getVectorInstrCost;
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const override;
unsigned Index, const Value *Op0,
const Value *Op1) const override;
InstructionCost getAddressComputationCost(Type *Val, ScalarEvolution *SE,
const SCEV *Ptr) const override;

5
llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
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@@ -316,8 +316,9 @@ InstructionCost HexagonTTIImpl::getCastInstrCost(unsigned Opcode, Type *DstTy,
InstructionCost HexagonTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const {
unsigned Index,
const Value *Op0,
const Value *Op1) const {
Type *ElemTy = Val->isVectorTy() ? cast<VectorType>(Val)->getElementType()
: Val;
if (Opcode == Instruction::InsertElement) {

4
llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
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@@ -155,8 +155,8 @@ public:
using BaseT::getVectorInstrCost;
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const override;
unsigned Index, const Value *Op0,
const Value *Op1) const override;
InstructionCost
getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind,

4
llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
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@@ -674,8 +674,8 @@ InstructionCost PPCTTIImpl::getCmpSelInstrCost(
InstructionCost PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const {
unsigned Index, const Value *Op0,
const Value *Op1) const {
assert(Val->isVectorTy() && "This must be a vector type");
int ISD = TLI->InstructionOpcodeToISD(Opcode);

4
llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
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@@ -130,8 +130,8 @@ public:
using BaseT::getVectorInstrCost;
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const override;
unsigned Index, const Value *Op0,
const Value *Op1) const override;
InstructionCost getMemoryOpCost(
unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
TTI::TargetCostKind CostKind,

5
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
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@@ -2189,8 +2189,9 @@ InstructionCost RISCVTTIImpl::getCFInstrCost(unsigned Opcode,
InstructionCost RISCVTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const {
unsigned Index,
const Value *Op0,
const Value *Op1) const {
assert(Val->isVectorTy() && "This must be a vector type");
if (Opcode != Instruction::ExtractElement &&

4
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
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@@ -238,8 +238,8 @@ public:
using BaseT::getVectorInstrCost;
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const override;
unsigned Index, const Value *Op0,
const Value *Op1) const override;
InstructionCost getArithmeticInstrCost(
unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,

7
llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
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@@ -497,7 +497,7 @@ bool SystemZTTIImpl::hasDivRemOp(Type *DataType, bool IsSigned) const {
return (VT.isScalarInteger() && TLI->isTypeLegal(VT));
}
static bool isFreeEltLoad(Value *Op) {
static bool isFreeEltLoad(const Value *Op) {
if (isa<LoadInst>(Op) && Op->hasOneUse()) {
const Instruction *UserI = cast<Instruction>(*Op->user_begin());
return !isa<StoreInst>(UserI); // Prefer MVC
@@ -1194,8 +1194,9 @@ InstructionCost SystemZTTIImpl::getCmpSelInstrCost(
InstructionCost SystemZTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const {
unsigned Index,
const Value *Op0,
const Value *Op1) const {
if (Opcode == Instruction::InsertElement) {
// Vector Element Load.
if (Op1 != nullptr && isFreeEltLoad(Op1))

4
llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
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@@ -123,8 +123,8 @@ public:
using BaseT::getVectorInstrCost;
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const override;
unsigned Index, const Value *Op0,
const Value *Op1) const override;
bool isFoldableLoad(const LoadInst *Ld,
const Instruction *&FoldedValue) const;
InstructionCost getMemoryOpCost(

2
llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
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@@ -184,7 +184,7 @@ InstructionCost WebAssemblyTTIImpl::getMemoryOpCost(
InstructionCost WebAssemblyTTIImpl::getVectorInstrCost(
unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
Value *Op0, Value *Op1) const {
const Value *Op0, const Value *Op1) const {
InstructionCost Cost = BasicTTIImplBase::getVectorInstrCost(
Opcode, Val, CostKind, Index, Op0, Op1);

4
llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
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@@ -81,8 +81,8 @@ public:
using BaseT::getVectorInstrCost;
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const override;
unsigned Index, const Value *Op0,
const Value *Op1) const override;
InstructionCost getPartialReductionCost(
unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
ElementCount VF, TTI::PartialReductionExtendKind OpAExtend,

4
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
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@@ -4767,8 +4767,8 @@ X86TTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
InstructionCost X86TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const {
unsigned Index, const Value *Op0,
const Value *Op1) const {
static const CostTblEntry SLMCostTbl[] = {
{ ISD::EXTRACT_VECTOR_ELT, MVT::i8, 4 },
{ ISD::EXTRACT_VECTOR_ELT, MVT::i16, 4 },

4
llvm/lib/Target/X86/X86TargetTransformInfo.h
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@@ -166,8 +166,8 @@ public:
using BaseT::getVectorInstrCost;
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const override;
unsigned Index, const Value *Op0,
const Value *Op1) const override;
InstructionCost getScalarizationOverhead(
VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
TTI::TargetCostKind CostKind, bool ForPoisonSrc = true,