[BOLT][RISCV] Recognize mapping syms with encoded ISA (#68964)
RISC-V supports mapping syms for code that encode the exact ISA for which the code is valid. They have the form `$x<ISA>` where `<ISA>` is the textual encoding of an ISA specification. BOLT currently doesn't recognize these mapping symbols causing many binaries compiled with newer versions of GCC (which emits them) to not be properly processed. This patch makes sure BOLT recognizes them as code markers. Note that LLVM does not emit these kinds of mapping symbols yet so the test is based on a binary produced by GCC.
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@@ -1803,6 +1803,10 @@ MarkerSymType BinaryContext::getMarkerType(const SymbolRef &Symbol) const {
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if (*NameOrError == "$x" || NameOrError->startswith("$x."))
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return MarkerSymType::CODE;
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// $x<ISA>
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if (isRISCV() && NameOrError->startswith("$x"))
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return MarkerSymType::CODE;
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if (*NameOrError == "$d" || NameOrError->startswith("$d."))
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return MarkerSymType::DATA;
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47
bolt/test/RISCV/Inputs/mapping-syms-isa.yaml
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47
bolt/test/RISCV/Inputs/mapping-syms-isa.yaml
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@@ -0,0 +1,47 @@
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--- !ELF
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FileHeader:
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Class: ELFCLASS64
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Data: ELFDATA2LSB
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Type: ET_EXEC
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Machine: EM_RISCV
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Flags: [ EF_RISCV_RVC, EF_RISCV_FLOAT_ABI_DOUBLE ]
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Entry: 0x100B0
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ProgramHeaders:
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- Type: 0x70000003
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Flags: [ PF_R ]
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FirstSec: .riscv.attributes
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LastSec: .riscv.attributes
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Offset: 0xB8
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- Type: PT_LOAD
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Flags: [ PF_X, PF_R ]
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FirstSec: .text
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LastSec: .text
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VAddr: 0x10000
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Align: 0x1000
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Offset: 0x0
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Sections:
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- Name: .text
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Type: SHT_PROGBITS
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Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
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Address: 0x100B0
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AddressAlign: 0x2
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Content: '0100000000008280'
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- Name: .riscv.attributes
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Type: SHT_RISCV_ATTRIBUTES
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AddressAlign: 0x1
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Content: 4144000000726973637600013A0000000572763634693270315F6D3270305F613270315F663270325F643270325F633270305F7A696373723270305F7A6D6D756C31703000
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Symbols:
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- Name: '_start'
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Section: .text
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Binding: STB_GLOBAL
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Value: 0x100B0
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- Name: '$xrv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zmmul1p0'
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Section: .text
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Value: 0x100B0
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- Name: '$d'
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Section: .text
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Value: 0x100B2
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- Name: '$x'
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Section: .text
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Value: 0x100B6
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...
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18
bolt/test/RISCV/mapping-syms-isa.test
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18
bolt/test/RISCV/mapping-syms-isa.test
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@@ -0,0 +1,18 @@
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# Test that BOLT handles mapping syms that include ISA strings: $x<isa>
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RUN: yaml2obj -o %t %p/Inputs/mapping-syms-isa.yaml
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RUN: llvm-bolt --print-cfg --print-only=_start -o %t.bolt %t 2>&1 | FileCheck %s
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RUN: llvm-objdump -d %t.bolt | FileCheck --check-prefix=CHECK-OBJDUMP %s
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CHECK-NOT: BOLT-WARNING
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# Check that .word is not disassembled by BOLT
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CHECK: 00000000: nop
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CHECK: 00000002: ret
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# Check .word is still present in output
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CHECK-OBJDUMP: <_start>:
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CHECK-OBJDUMP-NEXT: nop
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CHECK-OBJDUMP-NEXT: unimp
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CHECK-OBJDUMP-NEXT: unimp
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CHECK-OBJDUMP-NEXT: ret
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