[MLIR][AArch64] Add integration test for lowering of vector.contract to Neon FEAT_I8MM (#144699)
This commit is contained in:
Momchil Velikov
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// REQUIRES: arm-emulator
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// DEFINE: %{compile} = mlir-opt %s \
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// DEFINE: --convert-vector-to-scf --convert-scf-to-cf --convert-vector-to-llvm='enable-arm-neon enable-arm-i8mm' \
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// DEFINE: --expand-strided-metadata --convert-to-llvm --finalize-memref-to-llvm \
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// DEFINE: --lower-affine --convert-arith-to-llvm --reconcile-unrealized-casts \
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// DEFINE: -o %t
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// DEFINE: %{entry_point} = main
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// DEFINE: %{run} = %mcr_aarch64_cmd %t -e %{entry_point} -entry-point-result=void --march=aarch64 --mattr="+neon,+i8mm" \
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// DEFINE: -shared-libs=%mlir_runner_utils,%mlir_c_runner_utils,%native_mlir_arm_runner_utils
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// RUN: rm -f %t && %{compile} && FileCheck %s --input-file=%t -check-prefix CHECK-IR && %{run} | FileCheck %s
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#packed_maps = [
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affine_map<(m, n, k) -> (m, k)>,
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affine_map<(m, n, k) -> (n, k)>,
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affine_map<(m, n, k) -> (m, n)>
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]
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//
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// Test the lowering of `vector.contract` using the `LowerContractionToNeonI8MMPattern`
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//
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// The operation that the `vector.contract` in this test performs is matrix
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// multiplication with accumulate
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// OUT = ACC + LHS * RHS
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// of two 8-bit integer matrices LHS and RHS, and a 32-bit integer matrix ACC
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// into a 32-bit integer matrix OUT. The LHS and RHS can be sign- or zero- extended,
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// this test covers all the possible variants.
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//
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// Tested are calculations as well as that the relevant `ArmNeon` dialect
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// operations ('arm_neon.smmla`, arm_neon.ummla`, etc) are emitted.
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//
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// That pattern above handles (therefore this test prepares) input/output vectors with
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// specific shapes:
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// * LHS: vector<MxKxi8>
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// * RHS: vector<NxKxi8>
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// * ACC, OUT: vector<MxNxi32>
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// where the M and N are even and K is divisible by 8.
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// Note that the RHS is transposed.
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// This data layout makes it efficient to load data into SIMD
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// registers in the layout expected by FEAT_I8MM instructions.
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// Such a `vector.contract` is representative of the code we aim to generate
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// by vectorisation of `linalg.mmt4d`.
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//
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// In this specific test we use M == 4, N == 4, and K == 8.
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//
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// Test the operation where both LHS and RHS are interpreted as signed, hence
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// we ultimately emit and execute the `smmla` instruction.
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// CHECK-IR-LABEL: llvm.func @test_smmla
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// CHECK-IR-COUNT-4: arm_neon.intr.smmla
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func.func @test_smmla() {
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%c0 = arith.constant 0 : index
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%c0_i32 = arith.constant 0 : i32
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%c0_i8 = arith.constant 0 : i8
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// Accumulator test data
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%acc_cst = arith.constant dense<[[-44, 20, 44, -46],
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[ -8, 25, -34, 26],
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[-20, -36, -3, 39],
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[-48, -31, -25, -21]]> : vector<4x4xi32>
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%acc_mem = memref.alloca() : memref<4x4xi32>
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vector.transfer_write %acc_cst, %acc_mem[%c0, %c0] : vector<4x4xi32>, memref<4x4xi32>
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%acc = vector.transfer_read %acc_mem[%c0, %c0], %c0_i32 {in_bounds = [true, true]} : memref<4x4xi32>, vector<4x4xi32>
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// LHS test data
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%lhs_cst = arith.constant dense<[[-35, -27, -36, -31, 23, -34, -8, -33],
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[-20, 17, -32, -47, 37, 22, -7, -21],
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[ -7, -35, 20, -4, 39, 46, -23, 40],
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[ 40, 27, 37, 43, 38, -6, 37, 49]]> : vector<4x8xi8>
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%lhs_mem = memref.alloca() : memref<4x8xi8>
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vector.transfer_write %lhs_cst, %lhs_mem[%c0, %c0] : vector<4x8xi8>, memref<4x8xi8>
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%lhs = vector.transfer_read %lhs_mem[%c0, %c0], %c0_i8 {in_bounds = [true, true]} : memref<4x8xi8>, vector<4x8xi8>
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// RHS test data
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%rhs_cst = arith.constant dense<[[-17, -50, -1, 48, -13, 22, 39, 33],
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[-35, -24, 37, -32, 33, 30, -11, -17],
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[-28, 31, 3, -44, -15, -27, 22, 35],
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[-23, 39, 48, 26, -23, 32, -39, -38]]> : vector<4x8xi8>
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%rhs_mem = memref.alloca() : memref<4x8xi8>
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vector.transfer_write %rhs_cst, %rhs_mem[%c0, %c0] : vector<4x8xi8>, memref<4x8xi8>
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%rhs = vector.transfer_read %rhs_mem[%c0, %c0], %c0_i8 {in_bounds = [true, true]} : memref<4x8xi8>, vector<4x8xi8>
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// Matrix multiplication and accumulate with transposed RHS.
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%0 = arith.extsi %lhs : vector<4x8xi8> to vector<4x8xi32>
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%1 = arith.extsi %rhs : vector<4x8xi8> to vector<4x8xi32>
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%2 = vector.contract {indexing_maps = #packed_maps,
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iterator_types = ["parallel", "parallel", "reduction"],
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kind = #vector.kind<add>} %0, %1, %acc
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: vector<4x8xi32>, vector<4x8xi32> into vector<4x4xi32>
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// Display the result of the multiplication
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vector.print str "Result(SMMLA):\n"
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%u0 = vector.extract %2[0] : vector<4xi32> from vector<4x4xi32>
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%u1 = vector.extract %2[1] : vector<4xi32> from vector<4x4xi32>
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%u2 = vector.extract %2[2] : vector<4xi32> from vector<4x4xi32>
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%u3 = vector.extract %2[3] : vector<4xi32> from vector<4x4xi32>
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vector.print %u0 : vector<4xi32>
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vector.print %u1 : vector<4xi32>
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vector.print %u2 : vector<4xi32>
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vector.print %u3 : vector<4xi32>
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return
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}
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// Test the operation where both LHS and RHS are interpreted as unsigned, hence
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// we ultimately emit and execute the `ummla` instruction.
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// CHECK-IR-LABEL: llvm.func @test_ummla
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// CHECK-IR-COUNT-4: arm_neon.intr.ummla
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func.func @test_ummla() {
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%c0 = arith.constant 0 : index
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%c0_i32 = arith.constant 0 : i32
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%c0_i8 = arith.constant 0 : i8
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// Accumulator test data
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%acc_cst = arith.constant dense<[[16, 16, 48, 40],
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[40, 24, 35, 12],
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[33, 24, 29, 19],
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[28, 13, 33, 18]]> : vector<4x4xi32>
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%acc_mem = memref.alloca() : memref<4x4xi32>
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vector.transfer_write %acc_cst, %acc_mem[%c0, %c0] : vector<4x4xi32>, memref<4x4xi32>
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%acc = vector.transfer_read %acc_mem[%c0, %c0], %c0_i32 {in_bounds = [true, true]} : memref<4x4xi32>, vector<4x4xi32>
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// LHS test data
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%lhs_cst = arith.constant dense<[[35, 42, 37, 49, 36, 36, 23, 33],
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[39, 34, 33, 45, 43, 10, 44, 47],
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[18, 35, 29, 25, 36, 33, 28, 29],
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[26, 49, 43, 32, 27, 16, 45, 33]]> : vector<4x8xi8>
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%lhs_mem = memref.alloca() : memref<4x8xi8>
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vector.transfer_write %lhs_cst, %lhs_mem[%c0, %c0] : vector<4x8xi8>, memref<4x8xi8>
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%lhs = vector.transfer_read %lhs_mem[%c0, %c0], %c0_i8 {in_bounds = [true, true]} : memref<4x8xi8>, vector<4x8xi8>
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// RHS test data
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%rhs_cst = arith.constant dense<[[18, 31, 37, 35, 44, 22, 37, 28],
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[21, 22, 49, 39, 30, 28, 35, 37],
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[21, 47, 39, 35, 23, 43, 24, 49],
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[49, 49, 40, 32, 37, 20, 47, 40]]> : vector<4x8xi8>
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%rhs_mem = memref.alloca() : memref<4x8xi8>
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vector.transfer_write %rhs_cst, %rhs_mem[%c0, %c0] : vector<4x8xi8>, memref<4x8xi8>
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%rhs = vector.transfer_read %rhs_mem[%c0, %c0], %c0_i8 {in_bounds = [true, true]} : memref<4x8xi8>, vector<4x8xi8>
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// Matrix multiplication and accumulate with transposed RHS.
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%0 = arith.extui %lhs : vector<4x8xi8> to vector<4x8xi32>
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%1 = arith.extui %rhs : vector<4x8xi8> to vector<4x8xi32>
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%2 = vector.contract {indexing_maps = #packed_maps,
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iterator_types = ["parallel", "parallel", "reduction"],
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kind = #vector.kind<add>} %0, %1, %acc
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: vector<4x8xi32>, vector<4x8xi32> into vector<4x4xi32>
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// Display the result of the multiplication
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vector.print str "Result(UMMLA):\n"
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%u0 = vector.extract %2[0] : vector<4xi32> from vector<4x4xi32>
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%u1 = vector.extract %2[1] : vector<4xi32> from vector<4x4xi32>
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%u2 = vector.extract %2[2] : vector<4xi32> from vector<4x4xi32>
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%u3 = vector.extract %2[3] : vector<4xi32> from vector<4x4xi32>
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vector.print %u0 : vector<4xi32>
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vector.print %u1 : vector<4xi32>
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vector.print %u2 : vector<4xi32>
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vector.print %u3 : vector<4xi32>
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return
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}
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// Test the operation where LHS is interpreted as unsigned and RHS is
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// interpreted as signed, hence we ultimately emit and execute the `usmmla`
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// instruction.
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// CHECK-IR-LABEL: llvm.func @test_usmmla
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// CHECK-IR-COUNT-4: arm_neon.intr.usmmla
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func.func @test_usmmla() {
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%c0 = arith.constant 0 : index
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%c0_i32 = arith.constant 0 : i32
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%c0_i8 = arith.constant 0 : i8
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// Accumulator test data
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%acc_cst = arith.constant dense<[[-44, 20, 44, -46],
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[ -8, 25, -34, 26],
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[-20, -36, -3, 39],
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[-48, -31, -25, -21]]> : vector<4x4xi32>
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%acc_mem = memref.alloca() : memref<4x4xi32>
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vector.transfer_write %acc_cst, %acc_mem[%c0, %c0] : vector<4x4xi32>, memref<4x4xi32>
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%acc = vector.transfer_read %acc_mem[%c0, %c0], %c0_i32 {in_bounds = [true, true]} : memref<4x4xi32>, vector<4x4xi32>
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// LHS test data
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%lhs_cst = arith.constant dense<[[153, 161, 24, 157, 211, 154, 52, 27],
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[168, 77, 136, 124, 249, 28, 13, 122],
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[ 97, 82, 181, 39, 53, 25, 80, 240],
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[184, 227, 106, 165, 126, 113, 121, 228]]> : vector<4x8xi8>
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%lhs_mem = memref.alloca() : memref<4x8xi8>
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vector.transfer_write %lhs_cst, %lhs_mem[%c0, %c0] : vector<4x8xi8>, memref<4x8xi8>
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%lhs = vector.transfer_read %lhs_mem[%c0, %c0], %c0_i8 {in_bounds = [true, true]} : memref<4x8xi8>, vector<4x8xi8>
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// RHS test data
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%rhs_cst = arith.constant dense<[[ 40, 27, 37, 43, 38, -6, 37, 49],
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[-17, -50, -1, 48, -13, 22, 39, 33],
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[-35, -24, 37, -32, 33, 30, -11, -17],
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[-28, 31, 3, -44, -15, -27, 22, 35]]> : vector<4x8xi8>
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%rhs_mem = memref.alloca() : memref<4x8xi8>
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vector.transfer_write %rhs_cst, %rhs_mem[%c0, %c0] : vector<4x8xi8>, memref<4x8xi8>
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%rhs = vector.transfer_read %rhs_mem[%c0, %c0], %c0_i8 {in_bounds = [true, true]} : memref<4x8xi8>, vector<4x8xi8>
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// Matrix multiplication and accumulate with transposed RHS.
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%0 = arith.extui %lhs : vector<4x8xi8> to vector<4x8xi32>
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%1 = arith.extsi %rhs : vector<4x8xi8> to vector<4x8xi32>
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%2 = vector.contract {indexing_maps = #packed_maps,
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iterator_types = ["parallel", "parallel", "reduction"],
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kind = #vector.kind<add>} %0, %1, %acc
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: vector<4x8xi32>, vector<4x8xi32> into vector<4x4xi32>
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// Display the result of the multiplication
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vector.print str "Result(USMMLA):\n"
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%u0 = vector.extract %2[0] : vector<4xi32> from vector<4x4xi32>
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%u1 = vector.extract %2[1] : vector<4xi32> from vector<4x4xi32>
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%u2 = vector.extract %2[2] : vector<4xi32> from vector<4x4xi32>
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%u3 = vector.extract %2[3] : vector<4xi32> from vector<4x4xi32>
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vector.print %u0 : vector<4xi32>
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vector.print %u1 : vector<4xi32>
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vector.print %u2 : vector<4xi32>
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vector.print %u3 : vector<4xi32>
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return
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}
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// Test the operation where LHS is interpreted as signed and RHS is interpreted
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// as unsigned. In this test we ultimately emit end execute the `usmmla`
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// instruction with reversed operands, see `LowerContractionToNeonI8MMPattern.cpp`
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// for more details.
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// CHECK-IR-LABEL: llvm.func @test_summla
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// CHECK-IR-COUNT-4: arm_neon.intr.usmmla
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func.func @test_summla() {
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%c0 = arith.constant 0 : index
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%c0_i32 = arith.constant 0 : i32
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%c0_i8 = arith.constant 0 : i8
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// Accumulator test data
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%acc_cst = arith.constant dense<[[-44, 20, 44, -46],
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[ -8, 25, -34, 26],
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[-20, -36, -3, 39],
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[-48, -31, -25, -21]]> : vector<4x4xi32>
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%acc_mem = memref.alloca() : memref<4x4xi32>
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vector.transfer_write %acc_cst, %acc_mem[%c0, %c0] : vector<4x4xi32>, memref<4x4xi32>
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%acc = vector.transfer_read %acc_mem[%c0, %c0], %c0_i32 {in_bounds = [true, true]} : memref<4x4xi32>, vector<4x4xi32>
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// LHS test data
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%lhs_cst = arith.constant dense<[[-35, -27, -36, -31, 23, -34, -8, -33],
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[-20, 17, -32, -47, 37, 22, -7, -21],
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[ -7, -35, 20, -4, 39, 46, -23, 40],
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[ 40, 27, 37, 43, 38, -6, 37, 49]]> : vector<4x8xi8>
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%lhs_mem = memref.alloca() : memref<4x8xi8>
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vector.transfer_write %lhs_cst, %lhs_mem[%c0, %c0] : vector<4x8xi8>, memref<4x8xi8>
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%lhs = vector.transfer_read %lhs_mem[%c0, %c0], %c0_i8 {in_bounds = [true, true]} : memref<4x8xi8>, vector<4x8xi8>
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// RHS test data
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%rhs_cst = arith.constant dense<[[125, 171, 138, 187, 108, 175, 82, 99],
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[221, 25, 164, 97, 156, 221, 218, 177],
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[171, 160, 219, 191, 144, 45, 161, 210],
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[223, 165, 123, 99, 108, 86, 37, 92]]> : vector<4x8xi8>
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%rhs_mem = memref.alloca() : memref<4x8xi8>
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vector.transfer_write %rhs_cst, %rhs_mem[%c0, %c0] : vector<4x8xi8>, memref<4x8xi8>
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%rhs = vector.transfer_read %rhs_mem[%c0, %c0], %c0_i8 {in_bounds = [true, true]} : memref<4x8xi8>, vector<4x8xi8>
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// Matrix multiplication and accumulate with transposed RHS.
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%0 = arith.extsi %lhs : vector<4x8xi8> to vector<4x8xi32>
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%1 = arith.extui %rhs : vector<4x8xi8> to vector<4x8xi32>
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%2 = vector.contract {indexing_maps = #packed_maps,
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iterator_types = ["parallel", "parallel", "reduction"],
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kind = #vector.kind<add>} %0, %1, %acc
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: vector<4x8xi32>, vector<4x8xi32> into vector<4x4xi32>
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// Display the result of the multiplication
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vector.print str "Result(SUMMLA (i.e. USMMLA transposed)):\n"
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%u0 = vector.extract %2[0] : vector<4xi32> from vector<4x4xi32>
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%u1 = vector.extract %2[1] : vector<4xi32> from vector<4x4xi32>
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%u2 = vector.extract %2[2] : vector<4xi32> from vector<4x4xi32>
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%u3 = vector.extract %2[3] : vector<4xi32> from vector<4x4xi32>
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vector.print %u0 : vector<4xi32>
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vector.print %u1 : vector<4xi32>
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vector.print %u2 : vector<4xi32>
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vector.print %u3 : vector<4xi32>
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return
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}
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func.func @main() {
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// CHECK-LABEL: Result(SMMLA):
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// CHECK: ( -1999, 1941, 685, -2879 )
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// CHECK: ( -3705, 2952, 987, -685 )
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// CHECK: ( 2565, 4157, -1589, -357 )
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// CHECK: ( 2383, -2252, 32, -1365 )
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func.call @test_smmla() : () -> ()
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// CHECK-LABEL: Result(UMMLA):
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// CHECK: ( 9183, 9513, 10460, 11314 )
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// CHECK: ( 9648, 9812, 10092, 12088 )
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// CHECK: ( 7548, 7625, 8398, 9044 )
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// CHECK: ( 8855, 9046, 9685, 11191 )
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func.call @test_ummla() : () -> ()
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// CHECK-LABEL: Result(USMMLA):
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// CHECK: ( 28403, 445, -2759, -11409 )
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// CHECK: ( 34908, 1047, 142, -7274 )
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// CHECK: ( 31032, 6807, -2378, 7382 )
|
||||
// CHECK: ( 44217, 6396, -10930, 623 )
|
||||
func.call @test_usmmla() : () -> ()
|
||||
|
||||
// CHECK-LABEL: Result(SUMMLA (i.e. USMMLA transposed)):
|
||||
// CHECK: ( -27190, -28812, -30502, -23575 )
|
||||
// CHECK: ( -7613, -8386, -15938, -6521 )
|
||||
// CHECK: ( 9468, 18750, 9199, 5764 )
|
||||
// CHECK: ( 33655, 41064, 48900, 31627 )
|
||||
func.call @test_summla() : () -> ()
|
||||
|
||||
return
|
||||
}
|
||||
Reference in New Issue
Block a user